IP Library Granted Patent US 10,083,668
Granted Patent B2
US 10,083,668 · App. 15/447,752 · Granted Sep 25, 2018

Semiconductor device, display device, and electronic device

Inventor: Kei Takahashi (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G3/3688G06F3/041G09G3/3696H01L21/78H03F3/45475H03F3/45968G09G2310/027G09G2310/0286G09G2310/08G11C19/00H03F2200/421H03F2203/45212H03M1/66
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Quick Facts
Patent No.
US 10,083,668
App. No.
15/447,752
Granted
Sep 25, 2018
Kind
B2
Abstract

A semiconductor device in which variations are controlled is provided. The semiconductor device has a function of converting a digital signal into an analog signal, and includes a digital-analog converter circuit, an amplifier circuit, first to fourth switches, a first output terminal, a second output terminal, and a power source. The amplifier circuit is configured to perform feedback control when the first switch and the fourth switch are on and the second switch and the third switch are off. The amplifier circuit is configured to perform comparison control when the first switch and the fourth switch are off and the second switch and the third switch are on; utilizing this, variations in the digital-analog converter circuit and the amplifier circuit are controlled.

Claims (118)

1. A semiconductor device comprising:

a digital-analog converter circuit;

an amplifier circuit;

a first switch;

a second switch;

a third switch;

a fourth switch;

a first output terminal;

a second output terminal; and

a first input terminal,

wherein an output terminal of the digital-analog converter circuit is electrically connected to a non-inverting input terminal of the amplifier circuit,

wherein one terminal of the first switch is electrically connected to an inverting input terminal of the amplifier circuit,

wherein the other terminal of the first switch is electrically connected to an output terminal of the amplifier circuit,

wherein one terminal of the second switch is electrically connected to the inverting input terminal of the amplifier circuit,

wherein the other terminal of the second switch is electrically connected to the first input terminal,

wherein one terminal of the third switch is electrically connected to the output terminal of the amplifier circuit,

wherein the other terminal of the third switch is electrically connected to the second output terminal,

wherein one terminal of the fourth switch is electrically connected to the output terminal of the amplifier circuit,

wherein the other terminal of the fourth switch is electrically connected to the first output terminal,

wherein the other terminal of the second switch is not electrically connected to the other terminal of the fourth switch,

wherein the amplifier circuit is configured to perform feedback control when the first switch and the fourth switch are on and the second switch and the third switch are off, and

wherein the amplifier circuit is configured to perform comparison control when the first switch and the fourth switch are off and the second switch and the third switch are on.

2. A semiconductor device comprising:

the semiconductor device according to claim 1 ; and

at least one of a shift register circuit, a data latch circuit, and a latch circuit.

3. A semiconductor device comprising:

the semiconductor device according to claim 1 ; and

an antenna,

wherein the antenna has a function of generating energy by any one of an electromagnetic coupling method, an electromagnetic induction method, and a radio wave method.

4. An electronic device comprising:

the semiconductor device according to claim 1 ; and

at least one of a display portion, a touch sensor, a microphone, a speaker, an operation key, and a housing.

5. A semiconductor wafer comprising:

a plurality of first regions; and

a region for dicing,

wherein each of the plurality of first regions is provided with the semiconductor device according to claim 1 .

6. A semiconductor device comprising:

a digital-analog converter circuit;

an amplifier circuit;

a first switch;

a second switch;

a third switch;

a first output terminal;

a second output terminal; and

a first input terminal,

wherein an output terminal of the digital-analog converter circuit is electrically connected to a non-inverting input terminal of the amplifier circuit,

wherein one terminal of the first switch is electrically connected to an inverting input terminal of the amplifier circuit,

wherein the other terminal of the first switch is electrically connected to an output terminal of the amplifier circuit,

wherein one terminal of the second switch is electrically connected to the inverting input terminal of the amplifier circuit,

wherein the other terminal of the second switch is electrically connected to the first input terminal,

wherein one terminal of the third switch is electrically connected to the output terminal of the amplifier circuit,

wherein the other terminal of the third switch is electrically connected to the second output terminal,

wherein the output terminal of the amplifier circuit is electrically connected to the first output terminal,

wherein the other terminal of the second switch is not electrically connected to the first output terminal,

wherein the amplifier circuit is configured to perform feedback control when the first switch is on and the second switch and the third switch are off, and

wherein the amplifier circuit is configured to perform comparison control when the first switch is off and the second switch and the third switch are on.

7. A semiconductor device comprising:

the semiconductor device according to claim 6 ; and

at least one of a shift register circuit, a data latch circuit, and a latch circuit.

8. A semiconductor device comprising:

the semiconductor device according to claim 6 ; and

an antenna,

wherein the antenna has a function of generating energy by any one of an electromagnetic coupling method, an electromagnetic induction method, and a radio wave method.

9. An electronic device comprising:

the semiconductor device according to claim 6 ; and

at least one of a display portion, a touch sensor, a microphone, a speaker, an operation key, and a housing.

10. A semiconductor wafer comprising:

a plurality of first regions; and

a region for dicing,

wherein each of the plurality of first regions is provided with the semiconductor device according to claim 6 .

11. A semiconductor device comprising:

a digital-analog converter circuit;

an amplifier circuit;

a first switch;

a second switch;

a third switch;

a fourth switch;

a fifth switch;

a first input terminal;

a second input terminal;

a first output terminal; and

a second output terminal,

wherein an output terminal of the digital-analog converter circuit is electrically connected to a non-inverting input terminal of the amplifier circuit,

wherein one terminal of the first switch is electrically connected to an inverting input terminal of the amplifier circuit,

wherein the other terminal of the first switch is electrically connected to an output terminal of the amplifier circuit,

wherein one terminal of the second switch is electrically connected to the inverting input terminal of the amplifier circuit,

wherein the other terminal of the second switch is electrically connected to the first input terminal,

wherein one terminal of the third switch is electrically connected to the output terminal of the amplifier circuit,

wherein the other terminal of the third switch is electrically connected to the second output terminal,

wherein one terminal of the fourth switch is electrically connected to the output terminal of the amplifier circuit,

wherein the other terminal of the fourth switch is electrically connected to the first output terminal,

wherein one terminal of the fifth switch is electrically connected to the first output terminal,

wherein the other terminal of the fifth switch is electrically connected to the second input terminal,

wherein the amplifier circuit is configured to perform feedback control when the first switch and the fourth switch are on and the second switch, the third switch, and the fifth switch are off,

wherein the amplifier circuit is configured to perform comparison control when the first switch and the fourth switch are off and the second switch, the third switch, and the fifth switch are on,

wherein the second switch, the third switch, and the fifth switch are controlled to be turned on or off by a same signal, and

wherein an input from the second input terminal is output to the first output terminal when the second switch, the third switch, and the fifth switch are on.

12. A semiconductor device comprising:

the semiconductor device according to claim 11 ; and

at least one of a shift register circuit, a data latch circuit, and a latch circuit.

13. A semiconductor device comprising:

the semiconductor device according to claim 11 ; and

an antenna,

wherein the antenna has a function of generating energy by any one of an electromagnetic coupling method, an electromagnetic induction method, and a radio wave method.

14. An electronic device comprising:

the semiconductor device according to claim 11 ; and

at least one of a display portion, a touch sensor, a microphone, a speaker, an operation key, and a housing.

15. A semiconductor wafer comprising:

a plurality of first regions; and

a region for dicing,

wherein each of the plurality of first regions is provided with the semiconductor device according to claim 11 .

16. The semiconductor device according to claim 11 , further comprising:

a signal line and

a pixel electrically connected to the signal line,

wherein an output to the first output terminal is applied to the signal line when the second switch, the third switch, and the fifth switch are on.

17. The semiconductor device according to claim 11 , wherein the other terminal of the second switch is not directly connected to the other terminal of the fifth switch.

18. The semiconductor device according to claim 1 , further comprising a frame memory,

wherein data of the frame memory is performed an operation based on a signal output from the second output terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2017
From: TAKAHASHI, KEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 042055/0807 →
Priority Claims (1)
JP 2016-045375 · Mar 9, 2016 · national
Continuity (1)
Related Publication 20170263205A1 · Sep 14, 2017