IP Library Granted Patent US 10,083,913
Granted Patent B2
US 10,083,913 · App. 15/284,003 · Granted Sep 25, 2018

Fan-out POP structure with inconsecutive polymer layer

Inventors: Yi-Lin Tsai (Tainan, TW); Jeffrey Chang (Hsin-Chu, TW); Jing-Cheng Lin (Hsin-Chu, TW); Nai-Wei Liu (Fengshan, TW); Tsei-Chung Fu (Toufen Township, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/5389H01L21/486H01L21/4853H01L21/4857H01L21/565H01L21/568H01L21/6835H01L21/6836H01L21/78H01L23/3114H01L23/3128H01L23/49811H01L23/5383H01L23/5384H01L23/5386H01L24/83H01L25/0657H01L25/105H01L25/50H01L24/32H01L2221/68318H01L2221/68345H01L2221/68359H01L2221/68381H01L2224/04105H01L2224/12105H01L2224/32225H01L2224/48091H01L2224/48227H01L2224/73265H01L2224/8385H01L2225/1035H01L2225/1058H01L2924/15311H01L2924/18162
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Quick Facts
Patent No.
US 10,083,913
App. No.
15/284,003
Granted
Sep 25, 2018
Kind
B2
Abstract

A package includes a device die, a molding material molding at least a portion of the device die therein, and a through-via substantially penetrating through the molding material. The package further includes a dielectric layer contacting the through-via and the molding material, and a die attach film attached to a backside of the device die. The die attach film includes a portion extending in the dielectric layer.

Claims (40)

1. A package comprising:

an encapsulating material;

a dielectric layer overlying the encapsulating material, wherein the encapsulating material comprises a first sidewall and a second sidewall opposite to each other, with a portion of the first sidewall contacting the dielectric layer;

a conductive post penetrating through the encapsulating material;

a device die; and

a die-attach film overlying and in contact with the device die, wherein edges of the die-attach film are vertically aligned to respective edges of the device die, and the die-attach film and the device die in combination penetrate through the encapsulating material, and wherein the second sidewall of the encapsulating material contacts the die-attach film and the device die.

2. The package of claim 1 , wherein a top portion of the device die extends into the dielectric layer.

3. The package of claim 1 , wherein a sidewall of the dielectric layer forms an interface with a sidewall of the die-attach film.

4. The package of claim 3 , wherein the sidewall of the dielectric layer further forms an additional interface with a sidewall of the device die.

5. The package of claim 1 , wherein the portion of the encapsulating material forms a ring encircling the die-attach film.

6. The package of claim 1 further comprising:

a package component overlying the device die and the encapsulating material;

a solder region penetrating through the dielectric layer, wherein the solder region bonds the package component to the conductive post; and

an underfill between the package component and the dielectric layer, wherein a bottom surface of the underfill forms an interface comprising:

a first portion formed between the underfill and the die-attach film; and

a second portion formed between the underfill and the dielectric layer, and the first portion and the second portion are coplanar with each other.

7. A package comprising:

an encapsulating material;

a dielectric layer extending from a top surface of the encapsulating material to an intermediate level of the encapsulating material, wherein the intermediate level is between the top surface and a bottom surface of the encapsulating material;

a die-attach film extending from the top surface of the encapsulating material into the encapsulating material;

a device die extending from the die-attach film to the bottom surface of the encapsulating material; and

a metal post extending from a bottom surface of the dielectric layer to the bottom surface of the encapsulating material.

8. The package of claim 7 , wherein the die-attach film is spaced apart from the dielectric layer by a portion of the encapsulating material, and the portion of the encapsulating material encircles the die-attach film.

9. The package of claim 7 , wherein a portion of the device die is at a same level as a portion of the dielectric layer.

10. The package of claim 7 , wherein edges of the die-attach film are vertically aligned to respective edges of the device die.

11. The package of claim 7 further comprising redistribution lines underlying the encapsulating material, wherein the redistribution lines are electrically coupled to the device die and the metal post.

12. A package comprising:

a device die;

an encapsulating material encapsulating at least a portion of the device die therein;

a through-via substantially penetrating through the encapsulating material;

a dielectric layer contacting the through-via and the encapsulating material; and

a die-attach film attached to a backside of the device die, wherein the die-attach film comprises a portion extending into the dielectric layer.

13. The package of claim 12 , wherein the dielectric layer comprises a through-opening, with the die-attach film extending into the through-opening.

14. The package of claim 13 , wherein the dielectric layer comprises edges exposed to the through-opening, and wherein the die-attach film comprises edges contacting the edges of the dielectric layer.

15. The package of claim 13 , wherein the dielectric layer comprises edges exposed to the through-opening, and wherein the die-attach film comprises edges separated from the edges of the dielectric layer by spacings, with the encapsulating material filling a portion of the through-opening.

16. The package of claim 12 further comprising a solder region extending into the dielectric layer to contact the through-via.

17. The package of claim 16 further comprising a top package bonded to the solder region.

18. The package of claim 12 , wherein the dielectric layer comprises a polymer.

19. The package of claim 12 , wherein the dielectric layer is further in contact with metal pillars in the device die.

20. The package of claim 1 further comprising an additional dielectric layer over the dielectric layer, wherein a bottom surface of the additional dielectric layer is in physical contact with the dielectric layer, the encapsulating material, and the die-attach film.

Continuity (2)
Division 14690061 · Apr 17, 2015
Related Publication 20170025359A1 · Jan 26, 2017
Cited By (4)
US 12,276,838 US 12,406,914 US 12,476,174 US 12,588,523