Transistor substrate, display device, and method of manufacturing the transistor substrate
A transistor substrate may include a base substrate, a data line, a conductive layer, a semiconductor layer, a gate electrode, and a pixel electrode. The data line may directly contact the base substrate. The conductive layer may directly contact the base substrate and may be spaced from the data line. The semiconductor layer may overlap the conductive layer, may be spaced from the conductive layer, and may include a source electrode and a drain electrode. The source electrode may be electrically connected to the data line. The gate electrode may overlap the semiconductor layer. The pixel electrode may be electrically connected to the drain electrode.
1. A transistor substrate comprising:
a base substrate;
a data line directly contacting the base substrate;
a conductive layer directly contacting the base substrate and being spaced from the data line;
a semiconductor layer overlapping the conductive layer, being spaced from the conductive layer, and comprising a source electrode and a drain electrode, wherein the source electrode is electrically connected to the data line;
a gate electrode overlapping the semiconductor layer; and
a pixel electrode electrically connected to the drain electrode.
2. The transistor substrate of claim 1 , wherein the active layer is positioned between the conductive layer and the pixel electrode, and wherein the conductive layer is electrically connected to the pixel electrode.
3. The transistor substrate of claim 1 ,
wherein a first portion of the pixel electrode directly contacts the conductive layer, and
wherein a second portion of the pixel electrode directly contacts the drain electrode and is positioned between the gate electrode and the first portion of the pixel electrode.
4. The transistor substrate of claim 3 , wherein the second portion of the pixel electrode is shorter than the first portion of the pixel electrode in a direction perpendicular to the base substrate.
5. The transistor substrate of claim 1 , further comprising:
an insulating layer directly contacting the pixel electrode; and
a bridge directly contacting the insulating layer and being spaced from the pixel electrode,
wherein a first portion of the bridge directly contacts the data line, and
wherein a second portion of the bridge directly contacts the source electrode and is positioned between the gate electrode and the first portion of the bridge.
6. The transistor substrate of claim 5 , wherein the second portion of the bridge is shorter than the first portion of the bridge in a direction perpendicular to the base substrate.
7. The transistor substrate of claim 5 , further comprising:
an insulator,
wherein a portion of the insulating layer is positioned between the first portion of the bridge and a face of the insulator and directly contacts the face of the insulator.
8. The transistor substrate of claim 5 , wherein a portion of the pixel electrode directly contacts the conductive layer and is as long as the first portion of the bridge in a direction perpendicular to the base substrate.
9. The transistor substrate of claim 1 , wherein the pixel electrode comprises Ni in a range of 3 to 10 parts by mass and La in a range of 1 to 7 parts by mass with respect to Al of 100 parts by mass.
10. The transistor substrate of claim 1 , further comprising:
an insulator directly contacting both the data line and the conductive layer,
wherein a face of the insulator is positioned between two faces of the conductive layer.
11. The transistor substrate of claim 1 , wherein an edge of the pixel electrode is positioned between the source electrode and the drain electrode.
12. The transistor substrate of claim 1 , further comprising an oxide layer directly contacting each of the source electrode, the drain electrode, and the gate electrode.
13. The transistor substrate of claim 1 , wherein an edge of the conductive layer is positioned between the source electrode and the drain electrode.
14. A display device comprising:
a pixel electrode;
a common electrode overlapping the pixel electrode;
a light emitting layer positioned between the pixel electrode and the common electrode;
a base substrate;
a data line directly contacting the base substrate;
a conductive layer directly contacting the base substrate and being spaced from the data line; a semiconductor layer overlapping the conductive layer, being spaced from the conductive layer, and comprising a source electrode and a drain electrode, wherein the source electrode is electrically connected to the data line, and wherein the drain electrode is electrically connected to the pixel electrode; and
a gate electrode overlapping the semiconductor layer.
15. A method of manufacturing a transistor substrate, the method comprising:
preparing a base substrate;
forming a data line and a conductive layer both directly contacting the base substrate;
forming a semiconductor layer comprising a source electrode and a drain electrode, overlapping the conductive layer, and being spaced from the conductive layer;
forming a gate electrode overlapping the semiconductor layer; and
forming a pixel electrode electrically connected to the drain electrode.
16. The method of claim 15 , further comprising:
forming an insulating layer before forming the pixel electrode, wherein the pixel electrode is formed on the insulating layer and directly contacts the insulating layer; and
forming a bridge directly contacting the insulating layer, wherein a first portion of the bridge directly contacts the data line, and wherein a second portion of the bridge directly contacts the source electrode and is positioned between the gate electrode and the first portion of the bridge.
17. The method of claim 16 ,
wherein a portion of the pixel electrode directly contacts the conductive layer and is as long as the first portion of the bridge in a direction perpendicular to the base substrate.
18. The method of claim 15 ,
wherein a first portion of the pixel electrode directly contacts the conductive layer, and
wherein a second portion of the pixel electrode directly contacts the drain electrode and is positioned between the gate electrode and the first portion of the pixel electrode.
19. The method of claim 15 , wherein an edge of the pixel electrode is positioned between the source electrode and the drain electrode.
20. The method of claim 15 , wherein an edge of the conductive layer is positioned between the source electrode and the drain electrode.