IP Library Granted Patent US 10,097,830
Granted Patent B2
US 10,097,830 · App. 15/004,362 · Granted Oct 9, 2018

Encoding device with flicker reduction

Inventors: Jung Yeop Yang (Seoul, KR); Hyuk Jae Jang (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H04N19/124H04N19/176H04N19/18
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Quick Facts
Patent No.
US 10,097,830
App. No.
15/004,362
Granted
Oct 9, 2018
Kind
B2
Abstract

In an application processor having an encoder configured to reduce flicker occurring in a display, the encoder includes a transformer configured to generate first frequency domain coefficients for individual block values of a current frame, a quantizer configured to quantize the first frequency domain coefficients to generate quantized coefficients, and a coefficient calculator configured to generate first adjusting coefficients for reducing the flicker, where the quantizer is configured to adjust the quantization coefficients based on the first adjusting coefficients and output adjusted quantization coefficients.

Claims (46)

1. An application processor having an encoder for reducing flicker on a display, the encoder comprising:

a transformer configured to generate first frequency domain coefficients for individual block values of a current frame;

a quantizer connected to the transformer and configured to quantize the first frequency domain coefficients and generate quantized coefficients; and

a coefficient calculator connected to the transformer and configured to generate first adjusting coefficients for reducing the flicker using the first frequency domain coefficients,

wherein the quantizer is connected to the coefficient calculator and configured to adjust the quantization coefficients based on the first adjusting coefficients, and output the adjusted quantization coefficients.

2. The application processor of claim 1 , the encoder further comprising an inverse-quantizer connected to the quantizer, wherein:

the transformer is configured to calculate second frequency domain coefficients for individual block values of a reconstructed previous frame;

the inverse-quantizer is configured to inverse-quantize the adjusted quantization coefficients to generate inverse-quantized coefficients, and

the coefficient calculator is connected to the inverse-quantizer and configured to adapt at least one of the first adjusting coefficients based on the inverse-quantized coefficients and the second frequency domain coefficients.

3. The application processor of claim 2 , wherein the current frame is a first I-frame, a previous frame related to the reconstructed previous frame is one of a second I-frame and a P-frame, and the individual block values are values for the k th block of the current and reconstructed previous frames, respectively.

4. The application processor of claim 2 , wherein the coefficient calculator is configured to change at least one of the first adjusting coefficients so as to minimize an absolute value of a sum of differences between each of the inverse-quantized coefficients and each of the second frequency domain coefficients.

5. The application processor of claim 1 , wherein the first adjusting coefficients include at least a portion of second adjusting coefficients, each of the second adjusting coefficients includes a plurality of elements, and each of the first adjusting coefficients includes a corresponding one of the plurality of elements.

6. The application processor of claim 5 , wherein the coefficient calculator is configured to generate at least a portion of the second adjusting coefficients for the first adjusting coefficients using a zig-zag scanning method.

7. A data processing system comprising a display and an application processor configured to control the display, the application processor comprising an encoder configured to reduce flicker occurring in the display, the encoder comprising:

a transformer configured to generate first frequency domain coefficients for individual block values of a current frame;

a quantizer connected to the transformer and configured to quantize the first frequency domain coefficients to generate quantized coefficients; and

a coefficient calculator connected to the transformer and configured to generate first adjusting coefficients for reducing the flicker,

wherein the quantizer is connected to the coefficient calculator and configured to adjust the quantization coefficients based on the first adjusting coefficients and output adjusted quantization coefficients, and

wherein the first adjusting coefficients include at least a portion of second adjusting coefficients, each of the second adjusting coefficients includes a plurality of elements, and each of the first adjusting coefficients includes a corresponding one of the plurality elements.

8. The data processing system of claim 7 , the encoder further comprising an inverse-quantizer connected to the quantizer, wherein:

the transformer is configured to calculate second frequency domain coefficients for individual block values of a reconstructed previous frame;

the inverse-quantizer is configured to inverse-quantize the adjusted quantization coefficients to generate inverse-quantized coefficients, and

the coefficient calculator is connected to the inverse-quantizer and configured to adapt at least one of the first adjusting coefficients based on the inverse-quantized coefficients and the second frequency domain coefficients.

9. The data processing system of claim 8 , wherein the current frame is a first I-frame, a previous frame related to the reconstructed previous frame is one of a second I-frame and a P-frame, and the individual block values are values for the k th block of the current and reconstructed previous frames, respectively.

10. The data processing system of claim 8 , wherein the coefficient calculator is configured to change at least one of the first adjusting coefficients so as to minimize an absolute value of a sum of differences between each of the inverse-quantized coefficients and each of the second frequency domain coefficients.

11. The data processing system of claim 7 , wherein the coefficient calculator is configured to generate at least a portion of the second adjusting coefficients for the first adjusting coefficients using a zig-zag scanning method.

12. The data processing system of claim 7 , further comprising:

an imaging device connected to the application processor;

a first serial interface connected between the application processor and the imaging device; and

a second serial interface connected between the application processor and the display.

13. The data processing system of claim 12 , wherein the first serial interface is a mobile industry processor interface (MIPI®) camera serial interface (CSI), and the second serial interface is MIPI® display serial interface (DSI).

14. The data processing system of claim 13 , further comprising a memory connected to the application processor,

wherein the application processor and the memory are packaged in a package on package (PoP) or a system-in-package (SiP).

15. An application processor having an encoder for reducing flicker on a display, the encoder comprising:

a transformer configured to generate first frequency domain coefficients for individual blocks of a current frame;

a quantizer connected to the transformer and configured to quantize the frequency domain coefficients and generate quantized coefficients;

an inverse-quantizer connected to the quantizer and configured generate inverse-quantized coefficients using the quantized coefficients; and

a mode decision unit connected to the inverse-quantizer and configured to select spatial-domain prediction blocks based on a cost function to optimize rate-distortion,

wherein the transformer is connected to the mode decision unit and configured to calculate second frequency domain coefficients for reconstructed previous blocks responsive to the selected spatial-domain prediction blocks to reduce flicker, and

wherein the cost function is calculated using the inverse-quantized coefficients.

16. The application processor of claim 15 , the mode decision unit comprising:

a quantization coefficient adjusting unit configured to calculate a flickering score value; and

a calculation unit configured to calculate a cost function value.

17. The application processor of claim 15 , wherein the current frame is a first 1-frame, a previous frame related to the reconstructed previous frame is one of a second I-frame or a P-frame, and the individual blocks are the k th blocks of the current and reconstructed previous frames, respectively.

18. The application processor of claim 15 , wherein the mode decision unit is configured to select spatial-domain prediction blocks to minimize an absolute value of a sum of differences between the inverse-quantized coefficients and the second frequency domain coefficients.

19. The application processor of claim 15 , wherein the mode decision unit is configured to select spatial-domain prediction blocks based on a LaGrangian cost function.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2016
From: YANG, JUNG YEOP; JANG, HYUK JAE
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 037560/0732 →
Priority Claims (1)
KR 10-2015-0040144 · Mar 23, 2015 · national
Continuity (1)
Related Publication 20160286214A1 · Sep 29, 2016