Electrostatic discharge protection semiconductor device
An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, at least a first doped region formed in the source region, and at least a second doped region formed in the drain region. The source region, the drain region and the second doped region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The second doped region is electrically connected to the first doped region. The gate set includes at least a first gate structure, a second gate structure, and a third gate structure.
1. An ESD protection semiconductor device comprising:
a substrate;
a gate set positioned on the substrate;
a plurality of source fins and a plurality of drain fins positioned on the substrate respectively at two sides of the gate set, and the source fins and the drain fins comprising a first conductivity type;
at least a first doped fin positioned on the substrate in between the source fins and parallel with the source fins and spaced apart from the source fins, the first doped fin comprising a second conductivity type, and the first conductivity type and the second conductivity type being complementary to each other; and
at least a second doped fin positioned on the substrate in between the drain fins and parallel with the drain fins and spaced apart from the drain fins, wherein the second doped fin comprises the first conductivity type and is electrically connected to the first doped fin.