IP Library › Granted Patent US 10,104,320
Granted Patent B2
US 10,104,320 · App. 15/098,117 · Granted Oct 16, 2018

Solid-state image pickup device with signal processing and level shifting

Inventors: Tetsuya Itano (Sagamihara, JP); Kazuo Yamazaki (Yokohama, JP); Nobuyuki Endo (Fujisawa, JP); Kyouhei Watanabe (Yokohama, JP)
Assignee: CANON KABUSHIKI KAISHA
H04N5/361H01L27/14609H01L27/14612H01L27/14634H04N5/3698H04N5/3742H01L27/1464
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Quick Facts
Patent No.
US 10,104,320
App. No.
15/098,117
Granted
Oct 16, 2018
Kind
B2
Abstract

Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.

Claims (24)

1. A solid-state image pickup device, comprising:

a pixel array including a plurality of pixels, each of the plurality of pixels including a photoelectric conversion unit and a transfer transistor configured to transfer charge generated in the photoelectric conversion unit;

a signal processing unit configured to process signals output from the pixels; and

a level shift unit configured to supply a pulse to a gate of the transfer transistor,

wherein amplitude of the pulse supplied to the gate of the transfer transistor is larger than amplitude of a pulse supplied to a gate of a transistor that constitutes the signal processing unit,

wherein the pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the signal processing unit is arranged on a second semiconductor substrate stacked on the first semiconductor substrate, and

wherein a gate insulating film of a transistor that constitutes the level shift unit is thicker than a gate insulating film of a transistor that constitutes the signal processing unit.

2. The solid-state image pickup device according to claim 1 , wherein the pixel further includes an amplifying transistor configured to amplify a signal based on the charge generated in the photoelectric conversion unit.

3. The solid-state image pickup device according to claim 2 , wherein the amplifying transistor arranged at the second semiconductor substrate.

4. The solid-state image pickup device according to claim 2 , wherein the amplifying transistor arranged at the first semiconductor substrate.

5. The solid-state image pickup device according to claim 1 , further comprising:

a transfer scanning unit, and

a transfer buffer unit in a path between the transfer transistors and the transfer scanning unit, the transfer buffer unit buffering a signal from the transfer scanning unit and including the level shift unit.

6. The solid-state image pickup device according to claim 1 , each of the plurality of pixels further including a reset unit, the solid-state image pickup device further comprising:

a reset scanning unit configured to sequentially drive the plurality of reset units; and

a reset buffer unit in a path between the reset units and the reset scanning unit, the reset buffer unit buffering a signal from the reset scanning unit.

7. The solid-state image pickup device according to claim 5 , each of the plurality of pixels further including a reset unit, the solid-state image pickup device further comprising:

a reset scanning unit configured to sequentially drive the plurality of reset units, and wherein the transfer scanning unit and the reset scanning unit are arranged at the second semiconductor substrate.

8. The solid-state image pickup device according to claim 2 ,

wherein each of the plurality of pixels includes a reset transistor, and

wherein the transfer transistor is a MOS transistor having a first conductivity type, the reset transistor is a MOS transistor having a second conductivity type, and the amplifying unit includes a source follower constituted by a transistor having the second conductivity type.

9. The solid-state image pickup device according to claim 5 , further comprising a timing generator configured to supply a clock signal to the transfer scanning circuit, which is arranged at the second semiconductor substrate.

10. The solid-state image pickup device according to claim 9 , wherein the signal processing unit comprises analog digital converters.

11. The solid-state image pickup device according to claim 10 , wherein a common output line is provided on the second semiconductor substrate, and a plurality of signals processed in parallel, at the analog digital converters, is converted into a serial signal to be output to the common output line.

Priority Claims (1)
JP 2009-274964 · Dec 2, 2009 · national
Continuity (2)
Continuation 13512281
Related Publication 20160309101A1 · Oct 20, 2016