IP Library Granted Patent US 10,121,785
Granted Patent B2
US 10,121,785 · App. 15/397,123 · Granted Nov 6, 2018

Pitch scalable active area patterning structure and process for multi-channel fin FET technologies

Inventors: Sivananda K. Kanakasabapathy (Niskayuna, NY); Fee Li Lie (Albany, NY); Eric Miller (Schenectady, NY); Stuart A. Sieg (Albany, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L27/0886H01L21/3081H01L21/31144H01L21/823431H01L27/0924H01L29/161H01L29/1608H01L29/201H01L29/6653H01L29/66545
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,121,785
App. No.
15/397,123
Granted
Nov 6, 2018
Kind
B2
Abstract

Provided herein is a multi-channel finFET having a plurality of fins prepared by a process. The process includes forming a series of mandrels on hard mask layer which overlays a semiconductor layer. The semiconductor layer has areas of a first semiconductor material and a second semiconductor material in contact with the hard mask layer. The process includes applying a first conformal coating on the hard mask layer and the series of mandrels, to form spacer layer sacrificial fins. The process includes removing the first conformal coating from horizontal surfaces while retaining the first conformal coating on sidewalls of the series of mandrels. The process includes removing the series of mandrels and etching into a material of the hard mask layer using the spacer layer sacrificial fins as a mask.

Claims (10)

1. A multi-channel finFET comprising:

a hard mask layer;

a semiconductor layer having areas of a first semiconductor material and a second semiconductor material in contact with the hard mask layer, wherein the semiconductor layer having its longest dimension in an x-y direction;

a plurality of fins of desired dimension in the first semiconductor material and the second semiconductor material, wherein the plurality of fins have their longest dimension in a z-direction, wherein the z-direction is normal to the x-y plane;

a first conformal coating layer on the plurality of fins;

a second conformal coating layer on the first conformal coating layer;

a third conformal coating layer on the second conformal coating layer,

wherein the first conformal coating layer comprises a thickness of 5 to 20 nanometers,

wherein the second conformal coating layer comprises a thickness of 1 to 5 nanometers,

wherein the first conformal coating layer and the second conformal coating layer are different materials selected from silicon oxide, silicon nitride, SiBCN (silicon borocarbon nitride), and SiOCN (silicon oxycarbon nitride).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2017
From: KANAKASABAPATHY, SIVANANDA K.; LIE, FEE LI; MILLER, ERIC; SIEG, STUART A.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 040827/0637 →
Continuity (2)
Division 15004063 · Jan 22, 2016
Related Publication 20170213825A1 · Jul 27, 2017
Cited By (1)
US 12,255,099