IP Library › Granted Patent US 10,126,335
Granted Patent B2
US 10,126,335 · App. 15/512,182 · Granted Nov 13, 2018

System for the verification of the absence of voltage

Inventors: Masud Bolouri-Saransar (Orland Park, IL); James E. Fabiszak (Darien, IL); Richard A. Rago (New Lenox, IL)
Assignee: Panduit Corp.
G01R19/155G01R15/12G01R31/2829G01R31/026
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Quick Facts
Patent No.
US 10,126,335
App. No.
15/512,182
Granted
Nov 13, 2018
Kind
B2
Abstract

A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.

Claims (12)

1. A system for the verification of the absence of voltage comprising:

a first impedance connected to a power source;

an amplitude limiter electrically connected to the first impedance;

a second impedance electrically connected to the first impedance and the amplitude limiter;

a varactor circuit electrically connected to the second impedance;

an isolation capacitor electrically connected to the second impedance and the varactor circuit;

an RF oscillator electrically connected to the isolation capacitor;

an envelope detection circuit electrically connected to the RF circuit and the isolation capacitor; and

a voltage detection circuit connected to the envelope circuit, wherein the amplitude limiter is configured to limit the voltage applied across the varactor circuit, the RF oscillator is configured to interact with the varactor circuit to create a modulated signal for the envelope circuit, and wherein the envelope circuit is configured to demodulate the signal for the voltage detector wherein the envelope circuit is electrically connected to the RF oscillator and the isolation capacitor via a buffer.

2. The system of claim 1 wherein the varactor circuit includes an inductor configured to create a resonance circuit.

3. The system of claim 2 further comprising a charge pump circuit configured to create a voltage similar to one intended to be detected by the system.

4. The system of claim 3 further comprising an independent high impedance path to ground for the charge pump circuit configured to create a voltage divider to the charge pump circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2017
From: BOLOURI-SARANSAR, MASUD; FABISZAK, JAMES E.; RAGO, RICHARD A.
To: PANDUIT CORP.
Reel/Frame 042630/0490 →
Continuity (2)
Provisional Application 62053420 · Sep 22, 2014
Related Publication 20170269129A1 · Sep 21, 2017