IP Library › Granted Patent US 10,127,405
Granted Patent B2
US 10,127,405 · App. 15/180,948 · Granted Nov 13, 2018

Techniques for determining an anti-replay counter for preventing replay attacks

Inventors: Vincent Pierre Le Roy (San Diego, CA); Olivier Jean Benoit (San Diego, CA)
Assignee: QUALCOMM Incorporated
G06F21/64G06F12/14G06F21/575G06F21/71G06F21/72H04L9/3242H04L9/3247
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Quick Facts
Patent No.
US 10,127,405
App. No.
15/180,948
Granted
Nov 13, 2018
Kind
B2
Abstract

Techniques for maintaining an anti-replay counter (ARC) for providing data protection in an integrated circuit are provided. A method according to these techniques includes determining a static baseline value based on an ARC value stored in a programmable read-only memory of the integrated circuit, determining the ARC value based on the static baseline value and a transient component, and storing the ARC value in a volatile memory of the integrated circuit.

Claims (95)

1. A method for providing data protection in an integrated circuit, the method comprising:

determining a static baseline value based on a value stored in a programmable read-only memory of the integrated circuit;

determining an anti-replay counter (ARC) value based on the static baseline value and a transient component;

storing the ARC value in a volatile memory of the integrated circuit;

redetermining the transient component of the ARC value stored in the volatile memory each time that data is to be written to off-chip, non-volatile memory by the integrated circuit; and

updating the value stored in the programmable read-only memory of the integrated circuit based on the transient component of the ARC value stored in the volatile memory responsive to an event indicative that the contents of the volatile memory may be lost.

2. The method of claim 1 ,

wherein the event indicative of the contents of the volatile memory may be lost is a power loss event.

3. The method of claim 2 , wherein the power loss event comprises loss of power to the integrated circuit from an external power source or a signal from a sensor indicative that the external power source may be or is about to be removed.

4. A method for providing data protection in an integrated circuit, the method comprising:

determining a static baseline value based on a value stored in a programmable read-only memory of the integrated circuit, wherein determining the static baseline value based on the ARC value stored in the programmable read-only memory comprises:

accessing the value stored in the programmable read-only memory, the value being stored as a pattern of bits in the programmable read-only memory;

selecting at least one bit from the programmable read-only memory that is not included in the pattern of bits;

setting a value of the at least one bit selected in the programmable read-only memory; and

determining the static baseline value based on the value stored in the programmable read-only memory and the at least one bit selected;

determining an anti-replay counter (ARC) value based on the static baseline value and a transient component; and

storing the ARC value in a volatile memory of the integrated circuit.

5. The method of claim 4 , wherein selecting the at least one bit from the programmable read-only memory that is not included in the pattern of bits comprises randomly selecting the at least one bit.

6. The method of claim 4 , further comprising determining the transient component, wherein determining the transient component comprises:

randomly selecting at least one bit of the programmable read-only memory not included in the static baseline value; and

setting a value of the at least one bit that was randomly selected.

7. The method of claim 4 , further comprising determining the transient component, wherein determining the transient component comprises:

selecting a set of bits from the programmable read-only memory that is not included in the static baseline value and not previously selected as the transient component, such that a number of bits comprising the set of bits is a minimum number of bits that can be selected; and

setting a value of the at least one bit that was selected.

8. The method of claim 1 , further comprising:

computing a message authentication code (MAC) or a cryptographic signature on at least the data or a digest of the data to be written to the off-chip, non-volatile memory using at least part of the ARC value; and

writing the data and the MAC to the off-chip, non-volatile memory.

9. An integrated circuit comprising:

means for determining a static baseline value based on a value stored in a programmable read-only memory of the integrated circuit;

means for determining an anti-replay counter (ARC) value based on the static baseline value and a transient component; and

means for storing the ARC value in a volatile memory of the integrated circuit;

means for redetermining the transient component of the ARC value stored in the volatile memory each time that data is to be written to off-chip, non-volatile memory by the integrated circuit; and

means for updating the value stored in the programmable read-only memory of the integrated circuit based on the transient component of the ARC value stored in the volatile memory responsive to an event indicative that the contents of the volatile memory may be lost.

10. The integrated circuit of claim 9 , further comprising:

means for redetermining the transient component each time that data is to be written to off-chip, non-volatile memory by the integrated circuit.

11. The integrated circuit of claim 9 , further comprising:

means for updating the ARC value stored in the programmable read-only memory based on the ARC value in the volatile memory responsive to a power loss event.

12. The integrated circuit of claim 11 , wherein the power loss event comprises loss of power to the integrated circuit from an external power source or a signal from a sensor indicative that the external power source may be or is about to be removed.

13. An integrated circuit comprising:

means for determining a static baseline value based on a value stored in a programmable read-only memory of the integrated circuit, wherein the means for determining the static baseline value based on the ARC value stored in the programmable read-only memory comprises:

means for accessing the value stored in the programmable read-only memory, the ARC value being stored as a pattern of bits in the programmable read-only memory;

means for selecting at least one bit from the programmable read-only memory that is not included in the pattern of bits;

means for setting a value of the at least one bit selected in the programmable read-only memory; and

means for determining the static baseline value based on the value stored in the programmable read-only memory and the at least one bit selected;

means for determining an anti-replay counter (ARC) value based on the static baseline value and a transient component; and

means for storing the ARC value in a volatile memory of the integrated circuit.

14. The integrated circuit of claim 13 , wherein the means for selecting the at least one bit from the programmable read-only memory that is not included in the pattern of bits comprises means for randomly selecting the at least one bit.

15. The integrated circuit of claim 13 , further comprising means for determining the transient component, wherein the means for determining the transient component comprises:

means for randomly selecting at least one bit of the programmable read-only memory not included in the static baseline value; and

means for setting a value of the at least one bit that was randomly selected.

16. The integrated circuit of claim 13 , further comprising means for determining the transient component, wherein the means for determining the transient component comprises:

means for selecting a set of bits from the programmable read-only memory that is not included in the static baseline value and not previously selected as the transient component, such that a number of bits comprising the set of bits is a minimum number of bits that can be selected; and

means for setting a value of the at least one bit that was selected.

17. The integrated circuit of claim 9 , further comprising:

means for computing a message authentication code (MAC) or a cryptographic signature on at least the data or a digest of the data to be written to the off-chip, non-volatile memory using at least part of the ARC value; and

means for writing the data and the MAC to the off-chip, non-volatile memory.

18. An integrated circuit comprising:

a volatile memory;

a programmable read-only memory;

a processor coupled to the volatile memory and the programmable read-only memory, the processor configured to:

determine a static baseline value based on a value stored in a programmable read-only memory of the integrated circuit;

determine an anti-replay counter (ARC) value based on the static baseline value and a transient component;

store the ARC value in a volatile memory of the integrated circuit;

redetermine the transient component of the ARC value stored in the volatile memory each time that data is to be written to off-chip, non-volatile memory by the integrated circuit; and

update the value stored in the programmable read-only memory of the integrated circuit based on the transient component of the ARC value stored in the volatile memory responsive to an event indicative that the contents of the volatile memory may be lost.

19. The integrated circuit of claim 18 ,

wherein the event indicative of the contents of the volatile memory may be lost is a power loss event.

20. The integrated circuit of claim 19 , wherein the power loss event comprises loss of power to the integrated circuit from an external power source or a signal from a sensor indicative that the external power source may be or is about to be removed.

21. An integrated circuit comprising:

a volatile memory;

a programmable read-only memory;

a processor coupled to the volatile memory and the programmable read-only memory, the processor configured to:

determine a static baseline value based on a value stored in a programmable read-only memory of the integrated circuit, wherein the processor being configured to determine the static baseline value based on the ARC value stored in the programmable read-only memory is further configured to:

access the ARC value stored in the programmable read-only memory, the ARC value being stored as a pattern of bits in the programmable read-only memory;

select at least one bit from the programmable read-only memory that is not included in the pattern of bits;

set a value of the at least one bit selected in the programmable read-only memory; and

determine the static baseline value based on the ARC value stored in the programmable read-only memory and the at least one bit selected;

determine an anti-replay counter (ARC) value based on the static baseline value and a transient component, the transient component comprising a value that is redetermined each time that the ARC value is required and is not stored in the programmable read-only memory of the integrated circuit; and

store the ARC value in a volatile memory of the integrated circuit.

22. The integrated circuit of claim 21 , wherein the processor being configured to select the at least one bit from the programmable read-only memory that is not included in the pattern of bits is configured to randomly select the at least one bit.

23. The integrated circuit of claim 21 , wherein the processor is further configured to determine the transient component, wherein the processor is configured to:

randomly select at least one bit of the programmable read-only memory not included in the static baseline value; and

set a value of the at least one bit that was randomly selected.

24. The integrated circuit of claim 21 , wherein the processor is further configured to determine the transient component, wherein the processor is configured to:

select a set of bits from the programmable read-only memory that is not included in the static baseline value and not previously selected as the transient component, such that a number of bits comprising the set of bits is a minimum number of bits that can be selected; and

set a value of the at least one bit that was selected.

25. The integrated circuit of claim 18 , wherein the processor is further configured to:

compute a message authentication code (MAC) or a cryptographic signature on at least the data or a digest of the data to be written to the off-chip, non-volatile memory using at least part of the ARC value; and

write the data and the MAC to the off-chip, non-volatile memory.

26. An non-transitory, computer-readable medium, having stored thereon computer-readable instructions for providing data protection in an integrated circuit, comprising instructions configured to cause the integrated circuit to:

determine a static baseline value based on a value stored in a programmable read-only memory of the integrated circuit;

determine an anti-replay counter (ARC) value based on the static baseline value and a transient component, the transient component comprising a value that is redetermined each time that the ARC value is required and is not stored in the programmable read-only memory of the integrated circuit; and

store the ARC value in a volatile memory of the integrated circuit.

27. The non-transitory, computer-readable medium of claim 26 ,

wherein the event indicative of the contents of the volatile memory may be lost is a power loss event.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2016
From: LE ROY, VINCENT PIERRE; BENOIT, OLIVIER JEAN
To: QUALCOMM INCORPORATED
Reel/Frame 039343/0238 →
Continuity (2)
Provisional Application 62334325 · May 10, 2016
Related Publication 20170329994A1 · Nov 16, 2017
Cited By (3)
US 12,380,184 US 12,554,897 US 12,717,975