Multi-chip module including stacked power devices with metal clip
A Multi-Chip Module (MCM) package includes a substrate having a plurality of metal terminals and at least a first die attach area. An encapsulant is around the substrate including on at least a portion of the topside and at least a portion of the bottomside of the package. At least a first device including at least two device terminals is attached face up on the first die attach area. At least a second device including at least two device terminals is flip-chip attached and stacked on the first device. At least one of the first device and second device include a transistor. At least one metal clip is between the first device and second device including a plurality of clip portions isolated from one another connecting at least one device terminal of each of the first device and second device to respective metal terminals of the plurality of metal terminals.
1. A multi-chip module comprising:
(a) a substrate;
(b) a first power device having a bottom side mounted on the substrate and having an active top side;
(c) a second power device having an active top side arranged facing the active side of the first power device and having a bottom side arranged away from the first clip portion;
(d) a first clip portion having plural fingers arranged between the first and second power devices and being electrically connected to the active top side of only the first power device;
(e) a second clip portion having plural fingers arranged between the first and second power devices and being electrically connected to the active top side of only the second power device; and
(f) a third clip portion arranged between the first and second power devices and electrically connected to the active top side of the first power device and to the active top side of the second power device.
2. The multi-chip module of claim 1 in which the fingers of the first clip portion and the fingers of the second clip portion are interdigitated.
3. The multi-chip module of claim 1 in which the first and second power devices are lateral power field effect transistors.
4. The multi-chip module of claim 1 in which the first clip portion is-carries a ground voltage.
5. The multi-chip module of claim 1 in which the second clip portion carries a VDD voltage.
6. The multi-chip module of claim 1 in which the third clip portion carries an output signal from between the first and second power devices.
7. The multi-chip module of claim 1 including a control die mounted on the substrate proximate the first power device, the control die including a first connection to a gate terminal of the first power device and a second connection to a gate terminal of the second power device.
8. A multi-chip module comprising:
(a) a lead frame having a plurality of metal terminals including single terminals and extended terminals, a first die attach area, and a second die attach area;
(b) a first lateral power field effect transistor having an active top side that includes drain terminals, a gate terminal, and source terminals, the first lateral power field effect transistor having a bottom side, opposite the active top side, mounted on the substrate at the first die attach area;
(c) a second lateral power field effect transistor having an active top side that includes drain terminals, a gate terminal, and source terminals, the second lateral power field effect transistor having a bottom side opposite the active top side, and the active top side of the second lateral power field effect transistor being arranged facing the active top side of the first lateral power field effect transistor;
(d) a first dip portion having plural fingers arranged between the active top sides of the first lateral power field effect transistor and the second lateral power field effect transistor, the first clip portion being electrically connected only to the source terminals of the first lateral power field effect transistor and having a portion extending beyond the first lateral power field effect transistor and being connected to a first extended terminal of the lead frame;
(e) a second clip portion having plural fingers arranged between the active top sides of the first lateral power field effect transistor and the second lateral power field effect transistor, the second clip portion being electrically connected only to the drain terminals of the second lateral power field effect transistor and having a portion extending beyond the second lateral power field effect transistor and being connected to a second extended terminal of the lead frame;
(f) a third clip portion arranged between the active faces of the first lateral power field effect transistor and the second lateral power field effect transistor, the third second clip portion being electrically connected only to the drain terminals of the first lateral power field effect transistor, being electrically connected only to the source terminals of the second lateral power field effect transistor, and having a portion extending beyond the lateral power field effect transistors and being connected to a terminal of the lead frame;
(g) a fourth clip portion electrically connected to the gate terminal of the first lateral power field effect transistor;
(h) a fifth dip portion electrically connected to the gate terminal of the second lateral power field effect transistor; and
(i) a control die mounted on the second die attach area and having a first electrical connection to the fourth dip portion and a second electrical connection to the fifth clip portion.
9. The multi-chip module of claim 8 in which the first clip portion carries a ground voltage.
10. The multi-chip module of claim 8 in which the second dip portion carries a VDD voltage.
11. The multi-chip module of claim 8 in which the third clip portion carries an output signal.
12. The multi-chip module of claim 8 in which the first clip portion, the second clip portion, the third clip portion, the fourth clip portion, and the fifth clip portion are separate from one another.
13. The multi-chip module of claim 8 in which the fingers of the first clip portion are interdigitated between the fingers of the second clip portion.