IP Library › Granted Patent US 10,134,124
Granted Patent B2
US 10,134,124 · App. 15/285,925 · Granted Nov 20, 2018

Reference image contour generation

Inventors: Weimin Ma (Beijing, CN); Zongqiang Yu (Beijing, CN)
Assignee: Dongfang Jingyuan Electron Limited
G06T7/001G03F7/00G06T7/0085G06T2207/30148
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Quick Facts
Patent No.
US 10,134,124
App. No.
15/285,925
Granted
Nov 20, 2018
Kind
B2
Abstract

A method for reference image contour generation includes generating a mask pattern based on design target information, generating a reference image based on a simulation of photolithographic effects on the mask pattern, generating a reference image contour pattern based on edge detection in the reference image, and generating a scanned image contour pattern as a function of the reference image contour pattern and a scanned image of an integrated circuit.

Claims (48)

1. A method for reference image contour generation, comprising:

generating, by a processor in response to instructions stored on a non-transitory computer readable medium, a scanned image contour pattern, wherein generating the scanned image contour pattern comprises:

generating a mask pattern based on design target information;

generating a reference image based on a simulation of photolithographic effects on the mask pattern;

generating a reference image contour pattern based on edge detection in the reference image; and

generating the scanned image contour pattern as a function of the reference image contour pattern and a scanned image of an integrated circuit by:

dividing the scanned image contour pattern and the reference image contour pattern into corresponding sectors; and

comparing the scanned image contour pattern to the reference image contour pattern within each sector.

2. The method of claim 1 , wherein the simulation of photolithographic effects is a function of an optical model based on characteristics of a lens used to fabricate the integrated circuit.

3. The method of claim 1 , wherein the simulation of photolithographic effects is a function of an optical model based on characteristics of a photomask used to fabricate the integrated circuit.

4. The method of claim 1 , further comprising:

generating a simulation of photoresist effects that are a function of a photoresist model based on characteristics of a photoresist layer used to fabricate the integrated circuit; and

generating the reference image based on a combination of the simulation of photolithographic effects and the simulation of photoresist effects.

5. The method of claim 1 , further comprising:

detecting a defect in the integrated circuit in an area where the scanned image contour pattern does not coincide with a corresponding area of the reference image contour pattern.

6. The method of claim 1 , wherein the comparing is performed on a per-line basis.

7. The method of claim 1 , wherein the comparing is performed on a per-object basis.

8. The method of claim 1 , further comprising:

performing measurements of integrated circuit features identified in the scanned image contour pattern.

9. The method of claim 1 , further comprising retrieving the scanned image from a memory.

10. A method for reference image contour generation, comprising:

generating, by a processor in response to instructions stored on a non-transitory computer readable medium, a scanned image contour pattern, wherein generating the scanned image contour pattern comprises:

generating a mask pattern based on design target information;

generating a reference image based on a simulation of photoresist effects on the mask pattern;

generating a reference image contour pattern based on edge detection in the reference image; and

generating the scanned image contour pattern as a function of the reference image contour pattern and a scanned image of an integrated circuit by:

dividing the scanned image contour pattern and the reference image contour pattern into corresponding sectors; and

comparing the scanned image contour pattern to the reference image contour pattern within each sector.

11. The method of claim 10 , wherein the simulation of photoresist effects are a function of a photoresist model based on characteristics of a photoresist layer used to fabricate the integrated circuit.

12. The method of claim 10 , further comprising:

detecting a defect in the integrated circuit in an area where the scanned image contour pattern does not coincide with a corresponding area of the reference image contour pattern.

13. The method of claim 10 , wherein the comparing is performed on a per-line basis.

14. The method of claim 10 , wherein the comparing is performed on a per-object basis.

15. The method of claim 10 , further comprising:

performing measurements of integrated circuit features identified in the scanned image contour pattern.

16. An apparatus, comprising: a memory; and

a processor configured to execute instructions stored in the memory to:

generate a mask pattern based on design target information;

generate a reference image based on a simulation of photolithographic effects on the mask pattern;

generate a reference image contour pattern based on edge detection in the reference image; and

generate a scanned image contour pattern as a function of the reference image contour pattern and a scanned image of an integrated circuit by:

dividing the scanned image contour pattern and the reference image contour pattern into corresponding sectors; and

comparing the scanned image contour pattern to the reference image contour pattern within each sector.

17. The apparatus of claim 16 , wherein the processor is further configured to execute instructions stored in the memory to:

generate a simulation of photoresist effects that are a function of a photoresist model based on characteristics of a photoresist layer used to fabricate the integrated circuit; and

generate the reference image based on a combination of the simulation of photolithographic effects and the simulation of photoresist effects.

18. The apparatus of claim 16 , wherein the processor is further configured to execute instructions stored in the memory to:

detect a defect in the integrated circuit in an area where the scanned image contour pattern does not coincide with a corresponding area of the reference image contour pattern.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 7, 2016
From: MA, WEIMIN; YU, ZONGQIANG
To: DONGFANG JINGYUAN ELECTRON LIMITED
Reel/Frame 039963/0857 →
Priority Claims (1)
CN 2016 1 0687770 · Aug 18, 2016 · national
Continuity (2)
Continuation PCTCN2016097167 · Aug 29, 2016
Related Publication 20180053291A1 · Feb 22, 2018