Microprocessor-controlled tamper detection system
A microprocessor-controlled tamper evident wrapping system detects tampering and records data related to a tampering event. Upon sealing an object or material within a layered composite material comprising alternating nonconducting and conducting layers, one or more microprocessors electrically coupled to conducting layers of the composite material arm the system and initiates a clock function. If the package is punctured, cut, or otherwise damaged, that event is detected and recorded by the microprocessor(s) and a reset function is activated for the next potential event. The system may be interrogated by a user to view and download a tampering event log, which may provide time, date, location, and/or other parameters associated with tampering events.
1. A system for tamper detection, said system comprising:
a layered composite material comprising a first conductive layer separated from a second conductive layer by an inner non-conductive layer, a first non-conductive outer layer in contact with the first conductive layer, and a second non-conductive outer layer in contact with the second conductive layer;
a first microprocessor electrically coupled to the first and second conductive layers;
a second microprocessor electrically coupled to the second conductive layer;
a power supply; and
means for communicating data from the microprocessor to a user
wherein:
said first microprocessor is electrically coupled to the second conductive layer through the second microprocessor;
said first microprocessor is programmed to:
arm the system when a potential is applied between the first and second conductive layers;
upon detecting a change in an electrical property in a circuit comprising the first and second conductive layers, recording a timed tampering event; and
upon recording the tampering event, resetting the system for possible detection of a future event.
2. The system of claim 1 , wherein detecting a change in an electrical property comprises detecting a change in an impedance.
3. The system of claim 1 , wherein the first and second conductive layers each comprise a metal foil.
4. The system of claim 1 , wherein one of the first and second conductive layers comprises a thin film metalized layer deposited onto a surface of one of the first and second outer non-conducting layer or a surface of the inner non-conducting layer.
5. The system of claim 1 , wherein the microprocessor is a thin film microprocessor.
6. The system of claim 1 , wherein the first and second microprocessors provide complete functional redundancy with respect to each other.
7. The system of claim 1 , further comprising a third microprocessor electrically coupled to the first and second microprocessors.
8. The system of claim 1 , further comprising a sensor in communication with the microprocessor and wherein the microprocessor received signals from the sensor and stores data derived from said sensor signals.
9. A system for tamper detection, said system comprising:
a layered composite material comprising a first conductive layer separated from a second conductive layer by an inner non-conductive layer, a first non-conductive outer layer in contact with the first conductive layer, and a second non-conductive outer layer in contact with the second conductive layer;
a first microprocessor electrically coupled to the first conductive layer;
a second microprocessor electrically coupled to the second conductive layer and the first microprocessor;
a power supply; and
means for communicating data from the microprocessor to a user
wherein:
the first and second conductive layers and first and second microprocessors are in an electrical circuit that is interrupted only by the inner nonconductive layer;
said first and second microprocessors are individually or collectively programmed to:
arm the system when a potential is applied between the first and second conductive layers;
upon detecting a change in an impedance between the first and second conductive layers, recording a timed tampering event; and
upon recording the tampering event, resetting the system for possible detection of a future event.
10. The system of claim 9 , wherein the completion of the circuit comprising the first and second conductive layers and first and second microprocessors causes one or both of the microprocessors to log a time stamped tamper event.
11. The system of claim 9 , wherein at least on of the first and second microprocessors is programmed to initiate a countermeasure when a tamper event is recorded.
12. The system of claim 8 , wherein said sensor measures temperature, barometric pressure, altitude, moisture, acceleration, crush force, radiation, or combinations thereof.