Semiconductor device and manufacturing method thereof

1. A semiconductor device, comprising:

a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface;

a first semiconductor chip which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, and is mounted on the wiring substrate so that the first front surface faces the first surface of the wiring substrate; and

a second semiconductor chip which includes a second front surface, a plurality of second front electrodes formed on the second front surface, and a second rear surface opposite to the second front surface, and is mounted on the first semiconductor chip so that the second front surface faces the first rear surface of the first semiconductor chip,

wherein the plurality of first terminals of the wiring substrate and the plurality of first front electrodes of the first semiconductor chip are electrically connected to each other via a plurality of first protrusion electrodes,

wherein the plurality of first rear electrodes of the first semiconductor chip and the plurality of second front electrodes of the second semiconductor chip are electrically connected to each other via a plurality of second protrusion electrodes,

wherein the plurality of first rear electrodes are formed in a first region of the first rear surface of the first semiconductor chip,

wherein a first metal pattern is formed in a second region on a peripheral side of the first rear surface relative to the first region,

wherein a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surfaces, and

wherein a first separation distance between the first rear surface of the first semiconductor chip and the second front surface of the second semiconductor chip in an outer periphery of the second region is smaller than a second separation distance between the first rear surface of the first semiconductor chip and the second front surface of the second semiconductor chip in the first region.

2. The semiconductor device according to claim 1 , wherein an area of the second front surface of the second semiconductor chip is larger than an area of the first rear surface of the first semiconductor chip, and

wherein the entire first rear surface is covered with the second front surface.

3. The semiconductor device according to claim 1 , wherein the first metal pattern is electrically isolated from a circuit formed in the first semiconductor chip.

4. The semiconductor device according to claim 1 , wherein the second region includes an outer periphery of the first rear surface, and

wherein, among four corner portions of the first rear surface which form a rectangle when seen in a plan view, the first metal pattern is formed at a first corner portion and a second corner portion located at a diagonal position of the first corner portion.

5. The semiconductor device according to claim 1 , wherein the protrusion height of the first metal pattern with respect to the first rear surface is at most half the protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.

6. The semiconductor device according to claim 5 , wherein the first metal pattern is embedded in a semiconductor substrate included in the first semiconductor chip, and a part of the first metal pattern is exposed in the first rear surface of the first semiconductor chip.

7. The semiconductor device according to claim 1 , wherein the second region includes an outer periphery of the first rear surface of the first semiconductor chip,

wherein a plurality of second metal patterns are formed in a third region between the first region and the second region in the first rear surface,

wherein a protrusion height of each of the plurality of second metal patterns with respect to the first rear surface is equal to the protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface, and

wherein the plurality of second metal patterns are not formed in the second region.

8. The semiconductor device according to claim 7 , wherein the plurality of second metal patterns are regularly formed in the third region.

9. The semiconductor device according to claim 7 , wherein the plurality of second metal patterns are electrically isolated from a circuit formed in the first semiconductor chip.

10. The semiconductor device according to claim 7 , wherein in the third region, a separation distance between the first rear surface of the first semiconductor chip and the second front surface of the second semiconductor chip is smaller than a protrusion height of the plurality of second protrusion electrodes with respect to the second front surface.

11. The semiconductor device according to claim 7 , wherein an electrode group including the plurality of first rear electrodes formed in the first region extends in a first direction when seen in a plan view, and

wherein a first width of the second region in a second direction perpendicular to the first direction is larger than a second width of the second region in the first direction.

12. The semiconductor device according to claim 7 , wherein a plurality of third electrode patterns which are electrically isolated from a circuit formed in the second semiconductor chip and are formed to protrude with respect to the second surface are formed in the second front surface of the second semiconductor chip, and

wherein some of the plurality of second metal patterns formed in the third region are formed at positions opposite to each of the plurality of third electrode patterns and are connected via a solder material.

13. A semiconductor device, comprising:

a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface;

a first semiconductor chip which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, and is mounted on the wiring substrate so that the first front surface faces the first surface of the wiring substrate; and

a second semiconductor chip which includes a second front surface, a plurality of second front electrodes formed on the second front surface, and a second rear surface opposite to the second front surface, and is mounted on the first semiconductor chip so that the second front surface faces the first rear surface of the first semiconductor chip,

wherein the plurality of first terminals of the wiring substrate and the plurality of first front electrodes of the first semiconductor chip are electrically connected to each other via a plurality of first protrusion electrodes,

wherein the plurality of first rear electrodes of the first semiconductor chip and the plurality of second front electrodes of the second semiconductor chip are electrically connected to each other via a plurality of second protrusion electrodes,

wherein the first rear surface of the first semiconductor chip includes a first region where the plurality of first rear electrodes are formed, a second region which is located on a peripheral side relative to the first region and includes an outer periphery of the first rear surface, and a third region between the first region and the second region,

wherein a plurality of first metal patterns are formed in the second region,

wherein a protrusion height of each of the plurality of first metal patterns with respect to the first rear surface is equal to a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface,

wherein the plurality of first metal patterns are not formed in the second region, and

wherein a first separation distance between the first rear surface of the first semiconductor chip and the second front surface of the second semiconductor chip in an outer periphery of the second region is smaller than a second separation distance between the first rear surface of the first semiconductor chip and the second front surface of the second semiconductor chip in the first region.