IP Library Granted Patent US 10,152,280
Granted Patent B2
US 10,152,280 · App. 15/847,439 · Granted Dec 11, 2018

Storage device and control method

Inventors: Takashi Ishiguro (Yokohama, JP); Hirokazu Morita (Yokohama, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F3/0659G06F1/32G06F1/3209G06F1/3275G06F3/0625G06F3/0634G06F3/0679G06F13/00H04L69/00Y02B70/16Y02D10/154
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Quick Facts
Patent No.
US 10,152,280
App. No.
15/847,439
Granted
Dec 11, 2018
Kind
B2
Abstract

According to one embodiment, a storage device includes a processor which executes first processing, second processing and third processing. The second processing includes processing for relaying a command issued by a host device, and an execution result of the first processing corresponding to the command, between the host device and the first processing. The third processing includes processing for causing the second processing to transition from a first state to a second state of lower energy consumption than the first state, when a first period in which the second processing is in an idle state exceeds a second period. The third processing further includes processing for maintaining the first state under a first condition, when the first period exceeds the second period.

Claims (39)

1. A control method for a storage device comprising a memory and a communication path used for communicating with a host device, the method comprising:

causing the communication path to transition from a first state to a second state of lower energy consumption than the first state, when a first time period exceeds a second time period, the first time period including a time period in which communication for receiving a command issued by the host device to request access to the memory, and communication for returning an execution result of the command to the host device are not executed, and

maintaining the first state of the communication path, when the first time period exceeds the second time period under a first condition.

2. The method of claim 1 , wherein the first condition comprises a condition that an uncompleted command being processed is present.

3. The method of claim 1 , wherein the first condition comprises a condition that a transmission length of an uncompleted command being processed is less than a first value.

4. The method of claim 1 , further comprising;

causing the communication path to transition to the first state, when the communication path is in the second state while processing corresponding to a command to request of reading data from the memory is being executed, and when the memory completes preparation of the data which is an object to be read.

5. The method of claim 1 , further comprising;

causing the communication path to transition to the first state, when the communication path is in the second state while processing corresponding to a command to request of reading data from the memory is being executed, and when storing of data which is an object to be read and which is stored in the memory into a buffer memory is completed.

6. The method of claim 1 , further comprising:

causing the communication path to transition to the first state, when the communication path is in the second state while processing corresponding to a command to request of accessing to the memory is being executed, and when a third time period elapsed since an uncompleted command being processed is relayed exceeds a fourth time period longer than the second time period.

7. A storage device of communicating with a host device comprising:

a memory;

an interface circuit having a communication path used for communicating with the host device; and

a controller circuit configured to control

a first process of transitioning the communication path from a first state to a second state of lower energy consumption than the first state in a case where a first time period exceeds a second time period while the communication path is in the first state and a particular condition is not satisfied, the first time period being a time period in which communication with the host device through the communication path is not executed, and

a second process of maintaining the first state of the communication path in a case where the first time period exceeds the second time period while the communication path is in the first state and the particular condition is satisfied.

8. The storage device of claim 7 , wherein the controller circuit is further configured to cause the communication path to transition to the first state, in a case where the communication path is in the second state during the first time period and another condition is satisfied.

9. The storage device of claim 7 , wherein the particular condition comprises a condition that an uncompleted command being processed is present.

10. The storage device of claim 7 , wherein the particular condition comprises a condition that a transmission length of an uncompleted command being processed is less than a first value.

11. The storage device of claim 7 , wherein the controller circuit is further configured to cause the communication path to transition to the first state, in a case where the communication path is in the second state while processing corresponding to a command to request of reading data from the memory is being executed, and the memory completes preparation of the data which is an object to be read.

12. The storage device of claim 7 , further comprising:

a buffer memory that stores data,

wherein the controller circuit is further configured to cause the communication path to transition to the first state, in a case where the communication path is in the second state while processing corresponding to a command to request of reading data from the memory is being executed, and storing of data which is an object to be read and which is stored in the memory into the buffer memory is completed.

13. The storage device of claim 7 , wherein the controller circuit is further configured to cause the communication path to transition to the first state, in a case where the communication path is in the second state while processing corresponding to a command to request of accessing to the memory is being executed, and a third time period elapsed since an uncompleted command being processed is relayed exceeds a fourth time period longer than the second time period.

14. A control method for a storage device comprising a memory and an interface circuit having a communication path used for communicating with a host device, the method comprising:

controlling a first process of transitioning the communication path from a first state to a second state of lower energy consumption than the first state in a case where a first time period exceeds a second time period while the communication path is in the first state and a particular condition is not satisfied, the first time period being a time period in which communication with the host device through the communication path is not executed, and

controlling a second process of maintaining the first state of the communication path in a case where the first time period exceeds the second time period while the communication path is in the first state and the particular condition is satisfied.

15. The method of claim 14 , further comprising:

causing the communication path to transition to the first state, in a case where the communication path is in the second state during the first time period and another condition is satisfied.

16. The method of claim 14 , wherein the particular condition comprises a condition that an uncompleted command being processed is present.

17. The method of claim 14 , wherein the particular condition comprises a condition that a transmission length of an uncompleted command being processed is less than a first value.

18. The method of claim 14 , further comprising;

causing the communication path to transition to the first state, in a case where the communication path is in the second state while processing corresponding to a command to request of reading data from the memory is being executed, and the memory completes preparation of the data which is an object to be read.

19. The method of claim 14 , wherein:

the storage device further comprises a buffer memory that stores data; and

the method further comprises causing the communication path to transition to the first state, in a case where the communication path is in the second state while processing corresponding to a command to request of reading data from the memory is being executed, and storing of data which is an object to be read and which is stored in the memory into the buffer memory is completed.

20. The method of claim 14 , further comprising;

causing the communication path to transition to the first state, in a case where the communication path is in the second state while processing corresponding to a command to request of accessing to the memory is being executed, and a third time period elapsed since an uncompleted command being processed is relayed exceeds a fourth time period longer than the second time period.

Assignments (3)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
Priority Claims (1)
JP 2015-155918 · Aug 6, 2015 · national
Continuity (2)
Continuation 15056238 · Feb 29, 2016
Related Publication 20180107432A1 · Apr 19, 2018