Cooling system for high power application specific integrated circuit with embedded high bandwidth memory
The subject disclosure relates to an integrated circuit package having an application specific integrated circuit, a high bandwidth memory, a first heat sink having a first footprint and a first path, and a second heat sink having a second footprint and a second path, wherein the second footprint does not exceed the first footprint. The thermal energy through the first path travels from the application specific integrated circuit to the first heat sink and thermal energy through the second path travel from the high bandwidth memory through one or more heat pipes to the second heat sink.
1. A cooling system comprising:
an application specific integrated circuit (ASIC) set on a substrate;
a high bandwidth memory (HBM) set on the substrate;
a first heat sink attached to the ASIC and the HBM by a thermal interface material; and
a second heat sink attached to the HBM via a heat pipe;
wherein the first heat sink is configured to direct thermal energy away from the ASIC and the HBM, and wherein the second heat sink is configured to at least partially divert thermal energy away from the HBM.
2. The cooling system of claim 1 , wherein the ASIC is adjacent to the HBM.
3. The cooling system of claim 2 , wherein the second heat sink is adjacent the HBM.
4. The cooling system of claim 3 , wherein a footprint of the first heat sink is equal to combined footprints of the ASIC, the HBM, and the second heat sink.
5. The cooling system of claim 1 , further comprising one or more heat pipes, wherein the one or more heat pipes are configured to at least partially divert the thermal energy from the HBM to the second heat sink.
6. The cooling system of claim 5 , wherein at least one of the heat pipes is a vapor chamber.
7. The cooling system of claim 5 , wherein the one or more heat pipes at least partially overlaps the HBM.
8. The cooling system of claim 5 , wherein a majority of thermal energy of the HBM is dissipated via the one or more heat pipes.
9. The cooling system of claim 1 , wherein the first heat sink and the second heat sink are not in direct physical contact.
10. An integrated circuit package comprising:
a first heat sink having a first footprint and a first path; and
an application specific integrated circuit (ASIC), a high bandwidth memory (HBM), a second path, and a second heat sink having a second footprint, wherein the second footprint does not exceed the first footprint,
wherein the ASIC, the HBM, and second heat sink are set on a substrate and the first heat sink is attached to the ASIC and the HBM by a thermal interface material,
wherein thermal energy from the ASIC and the HBM are diverted through the first path to the first heat sink and thermal energy from the HBM is at least partially diverted through the second path to the second heat sink via a heat pipe.
11. The integrated circuit package of claim 10 , further comprising one or more heat pipes, wherein the heat pipes form the second path.
12. The integrated circuit package of claim 11 , wherein the one or more heat pipes at least partially overlaps the HBM.
13. The integrated circuit package of claim 11 , wherein at least one of one or more heat pipes is a vapor chamber.
14. The integrated circuit package of claim 10 , wherein the ASIC is adjacent the HBM.
15. The integrated circuit package of claim 10 , wherein the second heat sink is adjacent the HBM.
16. The integrated circuit package of claim 10 , wherein the first heat sink and the second heat sink are not in direct physical contact.
17. An integrated circuit package comprising:
a first heat sink having a first footprint and a first path; and
an application specific integrated circuit (ASIC), a high bandwidth memory (HBM), a second path, and a second heat sink having a second footprint, wherein the second footprint does not exceed the first footprint,
wherein the ASIC, the HBM, and second heat sink are set on a substrate and the first heat sink is attached to the ASIC and the HBM by a thermal interface material,
wherein thermal energy from the ASIC and the HBM are diverted through the first path to the first heat sink and thermal energy from the HBM is at least partially diverted through the second path by one or more heat pipes to the second heat sink.
18. The integrated circuit package of claim 17 , wherein the ASIC is adjacent the HBM.
19. The integrated circuit package of claim 17 , wherein the second heat sink is adjacent the HBM.
20. The integrated circuit package of claim 17 , wherein the first heat sink and the second heat sink are not in direct physical contact.