Display apparatus and method of manufacturing the same
A display apparatus includes a substrate having a plurality of pixel areas, and a pixel circuit including a storage capacitor and a plurality of thin film transistors (TFTs) which are disposed in each pixel area. At least one of the plurality of TFTs includes a semiconductor layer disposed on the substrate and including a first ion impurity, a source area and a drain area, which are spaced apart from each other, have a first depth from a surface of the semiconductor layer, and include a second ion impurity, a gate electrode disposed on the semiconductor layer between the source area and the drain area, and a bias wiring electrically connected to the semiconductor layer and disposed adjacent to at least one of the source area and the drain area.
1. A display apparatus comprising:
a substrate having a plurality of pixel areas; and
a pixel circuit comprising a storage capacitor and a plurality of thin film transistors (TFTs) which are disposed in each pixel area, wherein at least one of the plurality of TFTs comprises:
a semiconductor layer disposed on the substrate and comprising a first ion impurity;
a source area and a drain area, which are spaced apart from each other, having a first depth from a surface of the semiconductor layer, and comprising a second ion impurity;
a gate electrode disposed on the semiconductor layer between the source area and the drain area; and
a bias wiring forming a direct connection to the semiconductor layer outside of the source area, the drain area, and a channel area between the source area and the drain area.
2. The display apparatus of claim 1 , wherein the first ion impurity and the second ion impurity are different conductive ion impurities.
3. The display apparatus of claim 1 , wherein the first depth is smaller than a thickness of the semiconductor layer.
4. The display apparatus of claim 1 , further comprising:
a signal input electrode connected to one of the source area and the drain area; and
a signal output electrode connected to the other one of the source area and the drain area,
wherein the bias wiring is disposed on the same layer as the signal input electrode and the signal output electrode.
5. The display apparatus of claim 1 , wherein the bias wiring does not overlap with the source area and the drain area.
6. The display apparatus of claim 1 , wherein:
the storage capacitor comprises a first electrode, a dielectric layer, and a second electrode; and
the first electrode is disposed on the same layer as the gate electrode and comprises a same material as the gate electrode.
7. The display apparatus of claim 6 , wherein the first electrode is the gate electrode of one TFT of the plurality of TFTs.
8. The display apparatus of claim 6 , wherein the bias wiring applies a same voltage to the semiconductor layer, as a voltage applied to the second electrode.
9. The display apparatus of claim 1 , wherein the semiconductor layer is disposed on the entire substrate.
10. A display apparatus comprising:
a substrate having a plurality of pixel areas; and
a pixel circuit comprising a storage capacitor and a plurality of thin film transistors (TFTs) which are disposed in each pixel area,
wherein at least one of the plurality of TFTs comprises:
a semiconductor layer disposed on the substrate and comprising a first ion impurity;
a source area and a drain area, which are spaced apart from each other, having a first depth from a surface of the semiconductor layer, and comprising a second ion impurity;
a gate electrode disposed on the semiconductor layer between the source area and the drain area; and
a bias wiring forming a direct connection to the semiconductor layer outside of the source area, the drain area, and a channel area between the source area and the drain area.