Method of manufacturing semiconductor device, and semiconductor device

1. A method of manufacturing a semiconductor device having a trench gate structure, comprising:

a stacking process of stacking a p-type semiconductor layer containing a p-type impurity on an n-type semiconductor layer containing an n-type impurity;

an n-type semiconductor region forming process of forming an n-type semiconductor region in at least part of the p-type semiconductor layer by ion-implanting an n-type impurity into the p-type semiconductor layer and performing heat treatment to activate the ion-implanted n-type impurity; and

a trench forming process of forming a trench that is recessed to pass through the p-type semiconductor layer and reach the n-type semiconductor layer, wherein

in the n-type semiconductor region forming process, a p-type impurity diffusion region in which the p-type impurity contained in the p-type semiconductor layer is diffused is formed in at least part of the n-type semiconductor layer that is located below the n-type semiconductor region.

2. The method of manufacturing the semiconductor device according to claim 1 ,

wherein a bottom face of the p-type impurity diffusion region is located to be flush with a bottom face of the trench or is located below the bottom face of the trench with respect to a direction of the stacking.

3. The method of manufacturing the semiconductor device according to claim 2 ,

wherein the trench forming process is performed after the n-type semiconductor region forming process, and

in the trench forming process, the trench is formed at a location that is overlapped with at least part of the p-type impurity diffusion region, and at least part of the bottom face of the trench is formed by the p-type impurity diffusion region.

4. The method of manufacturing the semiconductor device according to claim 1 ,

wherein the stacking process comprises a process of stacking a buffer layer on a substrate and a process of stacking the n-type semiconductor layer on the buffer layer, wherein

the substrate is formed from a semiconductor different from semiconductors of the n-type semiconductor layer and the p-type semiconductor layer.

5. The method of manufacturing the semiconductor device according to claim 4 , further comprising:

a process of forming an insulation film inside of the trench;

a process of forming a first electrode that is adjacent to and in contact with the n-type semiconductor region;

a process of forming a second electrode on the n-type semiconductor layer; and

a process of forming a control electrode configured to control a flow of electric current between the first electrode and the second electrode, on the insulation film.

6. The method of manufacturing the semiconductor device according to claim 1 ,

wherein each of the n-type semiconductor layer and the p-type semiconductor layer is mainly made of a nitride semiconductor.

7. A semiconductor device manufactured by the method of manufacturing the semiconductor device according to claim 1 .

8. The method of manufacturing the semiconductor device according to claim 1 , wherein the forming of the n-type semiconductor region comprises:

a first ion-implanting of an n-type impurity to form a first ion-implanted region in the p-type semiconductor layer; and

a second ion-implanting of an n-type impurity to form a second ion-implanted region in the p-type semiconductor layer.

9. The method of manufacturing the semiconductor device according to claim 8 , wherein the forming of the n-type semiconductor region further comprises:

forming a protective film on the p-type semiconductor layer;

forming a first mask on the protective film, the first mask being used in the first ion-implanting to form the first ion-implanted region; and

removing the first mask and forming a second mask on the protective film, the second mask being used in the second ion-implanting to form the second ion-implanted region.

10. The method of manufacturing the semiconductor device according to claim 9 , wherein the forming of the n-type semiconductor region further comprises:

after the second ion-implanting, removing the second mask and the protective film; and

forming a cap film on the p-type semiconductor layer, the heat treatment being performed after the forming of the cap film.

11. The method of manufacturing the semiconductor device according to claim 8 , wherein the performing of the heat treatment activates the n-type impurity implanted in the first ion-implanting and the n-type impurity implanted in the second ion-implanting.

12. The method of manufacturing the semiconductor device according to claim 8 , wherein a depth of the first ion-implanted region in the p-type semiconductor layer is different than a depth of the second ion-implanted region in the p-type semiconductor layer.

13. The method of manufacturing the semiconductor device according to claim 8 , wherein the p-type impurity diffusion region comprises a first p-type impurity diffusion region formed under the first ion-implanted region and a second p-type impurity diffusion region formed under the second ion-implanted region.

14. The method of manufacturing the semiconductor device according to claim 13 , wherein a depth of the first p-type impurity diffusion region in the n-type semiconductor layer is different than a depth of the second p-type impurity diffusion region in the n-type semiconductor layer.

15. A method of manufacturing a semiconductor device comprising:

forming a p-type semiconductor layer including a p-type impurity on an n-type semiconductor layer including an n-type impurity;

forming an n-type semiconductor region in the p-type semiconductor layer by ion-implanting an n-type impurity into the p-type semiconductor layer; and

performing heat treatment so as to:

activate the ion-implanted n-type impurity; and

diffuse the p-type impurity from a portion of the p-type semiconductor layer that is between the n-type semiconductor region and the n-type semiconductor layer, into the n-type semiconductor layer to form a p-type impurity diffusion region in the n-type semiconductor layer.

16. The method of manufacturing the semiconductor device according to claim 15 , wherein the forming of the n-type semiconductor region comprises:

a first ion-implanting of an n-type impurity to form a first ion-implanted region in the p-type semiconductor layer; and

a second ion-implanting of an n-type impurity to form a second ion-implanted region in the p-type semiconductor layer.

17. The method of manufacturing the semiconductor device according to claim 16 , wherein a depth of the first ion-implanted region in the p-type semiconductor layer is different than a depth of the second ion-implanted region in the p-type semiconductor layer.

18. The method of manufacturing the semiconductor device according to claim 16 , wherein the p-type impurity diffusion region comprises a first p-type impurity diffusion region formed under the first ion-implanted region and a second p-type impurity diffusion region formed under the second ion-implanted region.

19. The method of manufacturing the semiconductor device according to claim 16 , wherein the performing of the heat treatment activates the n-type impurity implanted in the first ion-implanting and the n-type impurity implanted in the second ion-implanting.