IP Library Granted Patent US 10,158,007
Granted Patent B2
US 10,158,007 · App. 15/725,040 · Granted Dec 18, 2018

Semiconductor device and manufacturing method thereof

Inventors: Wei-Yang Lee (Taipei, TW); Feng-Cheng Yang (Hsinchu County, TW); Ting-Yeh Chen (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L29/66795H01L21/762H01L29/0649H01L29/785Y02E10/50
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Quick Facts
Patent No.
US 10,158,007
App. No.
15/725,040
Granted
Dec 18, 2018
Kind
B2
Abstract

A semiconductor device includes an isolation layer disposed over a substrate, first and second fin structures, a gate structure, a source/drain structure. The first fin structure and the second fin structure are both disposed over the substrate, and extend in a first direction in plan view. The gate structure is disposed over parts of the first and second fin structures, and extends in a second direction crossing the first direction in plan view. A first void is formed in the source/drain structure.

Claims (48)

1. A semiconductor device comprising:

an isolation insulating layer disposed over a substrate;

a first fin structure and a second fin structure, both disposed over the substrate, the first and second fin structures extending in a first direction in plan view;

a source/drain structure;

a first void formed in the source/drain structure; and

a second void formed in the source/drain structure and located above the first void.

2. The semiconductor device of claim 1 , wherein:

the source/drain structure includes a first epitaxial layer and a second epitaxial layer disposed on the first epitaxial layer,

the first epitaxial layer has a first V-shape, and

the first void is formed by the second epitaxial layer at a bottom of the first V-shape.

3. The semiconductor device of claim 2 , wherein the second void is formed by the second epitaxial layer above the first void.

4. The semiconductor device of claim 3 , wherein a third void is formed by the second epitaxial layer above the second void.

5. The semiconductor device of claim 2 , wherein the source/drain structure further includes a third epitaxial layer disposed on the second epitaxial layer.

6. The semiconductor device of claim 5 , wherein:

the second epitaxial layer has a second V-shape, and

the second void is formed by the third epitaxial layer at a bottom of the second V-shape.

7. The semiconductor device of claim 6 , wherein a third void is formed by the third epitaxial layer above the second void.

8. A semiconductor device comprising:

a first fin structure and a second fin structure;

a source/drain structure; and

a first void formed in the source/drain structure, wherein:

the source/drain structure includes a first epitaxial layer and a second epitaxial layer disposed on the first epitaxial layer,

the first epitaxial layer has a first V-shape, and

the first void is formed by the second epitaxial layer at a bottom of the first V-shape.

9. The semiconductor device of claim 8 , wherein a second void is formed by the second epitaxial layer above the first void.

10. The semiconductor device of claim 9 , wherein a third void is formed by the second epitaxial layer above the second void.

11. The semiconductor device of claim 8 , wherein the source/drain structure further includes a third epitaxial layer disposed on the second epitaxial layer.

12. The semiconductor device of claim 8 , wherein:

the second epitaxial layer has a second V-shape, and

a second void is formed by the third epitaxial layer at a bottom of the second V-shape.

13. The semiconductor device of claim 12 , wherein a third void is formed by the third epitaxial layer above the second void.

14. A semiconductor device comprising:

a first fin structure, a second fin structure and a third fin structure, which protrude from an isolation insulating layer and are arranged such that the second fin structure is disposed between the first and third fin structures in a first direction in plan view;

a source/drain structure; and

lower voids formed in the source/drain structure, wherein:

the source/drain structure includes a first epitaxial layer and a second epitaxial layer disposed on the first epitaxial layer,

the first epitaxial layer has a first lower V-shape corresponding to an area between the first and second fin structures and a second lower V-shape corresponding to an area between the second and third fin structures, and

the lower voids includes a first lower void formed by the second epitaxial layer at a bottom of the first lower V-shape and a second lower void formed by the second epitaxial layer at a bottom of the second lower V-shape.

15. The semiconductor device of claim 14 , wherein the first and second lower voids are located at substantially a same first height.

16. The semiconductor device of claim 14 , further comprising middle voids formed in the second epitaxial layer,

wherein the middle voids includes a first middle void formed above the first lower void, and a second middle void formed above the second lower void.

17. The semiconductor device of claim 16 , wherein the first and second middle voids are located at substantially a same second height.

18. The semiconductor device of claim 14 , wherein the source/drain structure further includes a third epitaxial layer disposed on the second epitaxial layer.

19. The semiconductor device of claim 18 , wherein:

the second epitaxial layer has a first upper V-shape above the first lower V-shape and a second upper V-shape above the second lower V-shape,

middle voids are formed in the source/drain structure,

the middle voids include a first middle void formed by the third epitaxial layer at a bottom of the first upper V-shape and a second middle void formed by the third epitaxial layer at a bottom of the second upper V-shape.

20. The semiconductor device of claim 19 , wherein upper voids are formed by the third epitaxial layer above the middle voids.

Continuity (3)
Division 15393812 · Dec 29, 2016
Continuation 15060270 · Mar 3, 2016
Related Publication 20180047833A1 · Feb 15, 2018
Cited By (1)
US 12,490,463