IP Library › Granted Patent US 10,163,748
Granted Patent B2
US 10,163,748 · App. 15/387,855 · Granted Dec 25, 2018

Methods of manufacturing a printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer

Inventors: Dirk Robert Walter Leipold (San Jose, CA); George Maxim (Saratoga, CA); Julio C. Costa (Oak Ridge, NC); Baker Scott (San Jose, CA)
Assignee: Qorvo US, Inc.
H01L23/315H01L21/02266H01L21/02282H01L21/304H01L21/565H01L21/6835H01L23/20H01L23/291H01L23/293H01L23/3135H01L23/36H01L23/367H01L23/3731H01L23/3737H01L23/562H01Q1/50H05K1/0203H05K1/181H01L21/30604H01L23/3121H01L23/5223H01L23/5227H01L23/5228H01L24/17H01L28/10H01L28/20H01L28/40H01L2221/6834H01L2221/68327H01L2221/68381H01L2224/131H01L2224/13147H01L2224/16225H01L2224/16227H01L2224/73204H01L2224/92125H01L2924/0002H01L2924/19011H01L2924/19041H01L2924/19042H01L2924/19043
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Quick Facts
Patent No.
US 10,163,748
App. No.
15/387,855
Granted
Dec 25, 2018
Kind
B2
Abstract

A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned integrated passive die (IPD) attached to the printed circuit substrate. A protective layer is disposed over the thinned IPD to protect passive devices integrated within the thinned IPD, wherein the protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 10 3 Ohm-cm.

Claims (21)

1. A method of making a printed circuit module comprising:

providing a printed circuit substrate having an attached integrated passive die (IPD), the IPD having a device layer with only passive devices, a substrate layer, and an etch stop layer disposed between the substrate layer and the device layer;

removing the substrate layer to expose the etch stop layer to yield a thinned IPD; and

disposing an outer protective layer onto the etch stop layer to protect the passive devices integrated within the thinned IPD, wherein the outer protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 10 6 Ohm-cm.

2. The method of making the printed circuit module of claim 1 wherein removing the substrate layer is accomplished using chemical etching.

3. The method of making the printed circuit module of claim 2 wherein the chemical etching is conducted using a combination of ethylenediamine (EDA) and pyrocatechol (C 6 H 4 (OH) 2 ) and water.

4. The method of making the printed circuit module of claim 1 wherein removing the substrate layer is accomplished using a combination of mechanical etching and chemical etching.

5. The method of making the printed circuit module of claim 1 wherein a thickness of the outer protective layer ranges from about 100 μm to around 500 μm.

6. The method of making the printed circuit module of claim 1 wherein the thermal conductivity of the outer protective layer ranges from about 10 W/mK to around 50 W/mK.

7. The method of making the printed circuit module of claim 1 wherein the thermal conductivity of the outer protective layer ranges from about 50 W/mK to around 6600 W/mK.

8. The method of making the printed circuit module of claim 1 wherein the outer protective layer encloses a gas filled space over at least a portion of the thinned IPD.

9. The method of making the printed circuit module of claim 1 wherein the electrical resistivity of the outer protective layer ranges from about 10 12 Ohm-cm to around 10 16 Ohm-cm.

10. The method of making the printed circuit module of claim 1 wherein the electrical resistivity of the outer protective layer ranges from about 10 6 Ohm-cm to around 10 12 Ohm-cm.

11. The method of making the printed circuit module of claim 1 wherein the outer protective layer is a polymer layer.

12. The method of making the printed circuit module of claim 11 wherein the polymer layer is disposed over the thinned IPD using a molding process.

13. The method of making the printed circuit module of claim 11 wherein the polymer layer is disposed over the thinned IPD using a spin-on deposition process.

14. The method of making the printed circuit module of claim 11 wherein the polymer layer is disposed over the thinned IPD using spray deposition.

15. The method of making the printed circuit module of claim 1 wherein the outer protective layer is a ceramic layer.

16. The method of making the printed circuit module of claim 15 wherein the ceramic layer is disposed over the thinned IPD using molding.

17. The method of making the printed circuit module of claim 15 wherein the ceramic layer is disposed using sputtering.

18. The method of making the printed circuit module of claim 1 further including disposing an inner protective layer between the printed circuit substrate and the thinned IPD.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2016
From: LEIPOLD, DIRK ROBERT WALTER; MAXIM, GEORGE; COSTA, JULIO C.; SCOTT, BAKER
To: QORVO US, INC.
Reel/Frame 040744/0567 →
Continuity (3)
Division 14885243 · Oct 16, 2015
Provisional Application 62074429 · Nov 3, 2014
Related Publication 20170098587A1 · Apr 6, 2017