IP Library › Granted Patent US 10,163,749
Granted Patent B2
US 10,163,749 · App. 15/784,709 · Granted Dec 25, 2018

Semiconductor device and method of manufacturing the same

Inventors: Masayuki Aoike (Kyoto, JP); Atsushi Kurokawa (Kyoto, JP); Atsushi Kobayashi (Kyoto, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01L23/3171H01L21/0214H01L21/0217H01L21/02164H01L21/02274
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Quick Facts
Patent No.
US 10,163,749
App. No.
15/784,709
Granted
Dec 25, 2018
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate, a semiconductor element formed in or on the semiconductor substrate, a metal layer connected to the semiconductor element, and a passivation film that protects the semiconductor element. The passivation film is formed by alternately stacking a first insulation film that has larger tensile stress and a second insulation film that has smaller tensile stress. Each of the first insulation film and the second insulation film is one of a silicon nitride film, a silicon oxide film, and a silicon oxynitride film. The passivation film as a whole generates tensile stress.

Claims (20)

1. A semiconductor device comprising:

a semiconductor substrate;

a semiconductor element provided in or on the semiconductor substrate; and

a passivation film protecting the semiconductor element,

wherein the passivation film comprising one or more first insulation films and one or more second insulation films, the first insulation films and second insulation films are alternately stacked to each other, each of the first insulation films has larger tensile stress and each of the second insulation films has smaller tensile stress, and the passivation film as a whole generates tensile stress,

the semiconductor device further comprising a semiconductor layer, an insulation layer, an organic layer, and a metal layer provided on or over the semiconductor substrate, and

wherein the passivation film covers the semiconductor layer, the insulation layer, the organic layer, and the metal layer.

2. The semiconductor device according to claim 1 ,

wherein each of the second insulation films generates compressive stress.

3. The semiconductor device according to claim 1 ,

wherein each of the first insulation films and the second insulation films is one of a silicon nitride film, a silicon oxide film, and a silicon oxynitride film.

4. The semiconductor device according to claim 2 ,

wherein each of the first insulation films and the second insulation films is one of a silicon nitride film, a silicon oxide film, and a silicon oxynitride film.

5. A method of manufacturing a semiconductor device, the method comprising:

a step of forming a passivation film on or over a semiconductor substrate by alternately stacking one or more first insulation films and one or more second insulation films, each of the first insulation films has larger tensile stress and each of the second insulation films has smaller tensile stress so that the passivation film as a whole generates tensile stress,

the method further comprising:

a step of forming a semiconductor layer, an insulation layer, an organic layer, and a metal layer on or over the semiconductor substrate, the step being performed before the step of forming the passivation film,

wherein, in the step of forming the passivation film, the passivation film covers the semiconductor layer, the insulation layer, the organic layer, and the metal layer.

6. The method according to claim 5 ,

wherein the metal layer is formed by vapor deposition or plating.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2017
From: AOIKE, MASAYUKI; KUROKAWA, ATSUSHI; KOBAYASHI, ATSUSHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 043873/0830 →
Priority Claims (1)
JP 2016-205225 · Oct 19, 2016 · national
Continuity (1)
Related Publication 20180108588A1 · Apr 19, 2018