IP Library Granted Patent US 10,168,940
Granted Patent B2
US 10,168,940 · App. 15/436,921 · Granted Jan 1, 2019

Data storage using SLC and TLC memory banks and data maintenance method thereof

Inventor: Yu-Wei Fan (Taipei, TW)
Assignee: SILICON MOTION, INC.
G06F3/064G06F3/0604G06F3/0619G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 10,168,940
App. No.
15/436,921
Granted
Jan 1, 2019
Kind
B2
Abstract

A data storage device includes a flash memory and a controller. The flash memory has a plurality of SLC-spare blocks, a plurality of SLC-data blocks, a plurality of TLC-spare blocks and a plurality of TLC-data blocks. The controller writes data into the SLC-spare blocks in response to a write command arranged to write the data into the flash memory, wherein when a first predetermined condition is satisfied, the controller selects a plurality of first TLC-data blocks with the least amount of valid data from the TLC-data blocks, writes valid data stored in the first TLC-data blocks into at least one first TLC-spare block, and releases the TLC-data blocks to increase the number of TLC-spare blocks by one.

Claims (46)

1. A data storage device, comprising:

a flash memory, having a plurality of single level cell (SLC)-spare blocks, a plurality of SLC-data blocks, a plurality of triple level cell (TLC)-spare blocks and a plurality of TLC-data blocks; and

a controller, writing data into the SLC-spare blocks in response to a write command arranged to write the data into the flash memory, wherein when a first predetermined condition is satisfied, the controller selects a plurality of first TLC-data blocks with the least amount of valid data from the TLC-data blocks, writes valid data stored in the first TLC-data blocks into at least one first TLC-spare block, and releases the first TLC-data blocks to increase a number of TLC-spare blocks by one,

wherein when the first predetermined condition is satisfied, the controller further writes a first part of the data into a first SLC-spare block of the SLC-spare blocks before selecting the first TLC-data blocks,

wherein when the first predetermined condition is satisfied, the controller further maps at least one logical address of the data to the written first SLC-spare block and defines the written first SLC-spare block mapped to the logical address as the SLC-data block after releasing the first TLC-data blocks.

2. The data storage device as claimed in claim 1 , wherein a length of invalid data stored in the first TLC-data blocks is equal to a length of data stored in the TLC-data block or the TLC-spare block.

3. The data storage device as claimed in claim 1 , wherein before writing the other parts of the data except for the first part into the other SLC-spare blocks, the controller executes the steps of selecting the first TLC-data blocks and writing the valid data stored in the first TLC-data blocks into the first TLC-spare block to release the first TLC-data blocks.

4. The data storage device as claimed in claim 1 , wherein the first predetermined condition comprises the number of TLC-spare blocks being less than a first predetermined amount.

5. The data storage device as claimed in claim 1 , wherein when the first predetermined condition is not satisfied, the controller consecutively writes the data into the SLC-spare blocks.

6. The data storage device as claimed in claim 1 , wherein the SLC-spare blocks are SLC blocks that do not have valid data, the SLC-data blocks are SLC blocks that have valid data, the TLC-spare blocks are TLC blocks that do not have valid data, and the TLC-data blocks are TLC blocks that have valid data.

7. A data storage device, comprising:

a flash memory, having a plurality of logical single level cell (SLC)-spare blocks, a plurality of logical SLC-data blocks, a plurality of triple level cell (TLC)-spare blocks and a plurality of TLC-data blocks; and

a controller, writing data into one of the logical SLC-spare blocks in response to a write command from a host, wherein when a first predetermined condition is satisfied, the controller selects a part of the TLC-data blocks with the least amounts of valid data, writes valid data stored in the part of the TLC-data blocks into one of the TLC-spare blocks, and releases the part of the TLC-data blocks,

wherein when the first predetermined condition is satisfied, the controller further writes a first part of the data into a first logical SLC-spare block of the logical SLC-spare blocks before selecting the part of the TLC-data blocks,

wherein when the first predetermined condition is satisfied, the controller further maps at least one logical address of the data to the written the first logical SLC-spare block and defines the written the first logical SLC-spare block mapped to the logical address as the logical SLC-data block after releasing the part of TLC-data blocks.

8. The data storage device as claimed in claim 7 , wherein the first predetermined condition comprises the number of TLC-spare blocks being less than a first predetermined amount.

9. The data storage device as claimed in claim 7 , wherein when the first predetermined condition is not satisfied, the controller consecutively writes the data into the one of the logical SLC-spare blocks.

10. The data storage device as claimed in claim 7 , wherein the logical SLC-spare blocks are SLC blocks that do not have valid data, the logical SLC-data blocks are SLC blocks that have valid data.

11. The data storage device as claimed in claim 7 , wherein the logical SLC-data blocks are simulated by the TLC-data blocks and the logical SLC-spare blocks are simulated by the TLC-spare blocks.

12. A data maintenance method, applied to a data storage device having a flash memory, wherein the flash memory has a plurality of single level cell (SLC)-spare blocks, a plurality of SLC-data blocks, a plurality of triple level cell (TLC)-spare blocks and a plurality of TLC-data blocks, the data maintenance method comprising:

receiving a write command arranged to write data into the flash memory; and

writing the data into the SLC-spare blocks in response to the write command, wherein when a first predetermined condition is satisfied, the step of writing the data into the SLC-spare blocks further comprises:

selecting a plurality of first TLC-data blocks with the least amount of valid data from the TLC-data blocks;

writing valid data stored in the first TLC-data blocks into at least one first TLC-spare block; and

releasing the first TLC-data block to increase a number of TLC-spare blocks by one,

wherein when the first predetermined condition is satisfied, the step of writing the data into the SLC-spare blocks further comprises:

writing a first part of the data into a first SLC-spare block of the SLC-spare blocks before selecting the first TLC-data blocks; and

mapping at least one logical address of the data to the written first SLC-spare block and defining the written first SLC-spare block mapped to the logical address as the SLC-data block, after releasing the first TLC-data blocks.

13. The data maintenance method as claimed in claim 12 , wherein a length of invalid data stored in the first TLC-data blocks is equal to a length of data stored in the TLC-data block or the TLC-spare block.

14. The data maintenance method as claimed in claim 12 , wherein the steps of selecting the first TLC-data blocks, writing the valid data stored in the first TLC-data blocks into the first TLC-spare block, and releasing the first TLC-data blocks are performed before writing the other parts of the data except for the first part into the other SCL-spare blocks.

15. The data maintenance method as claimed in claim 12 , wherein the first predetermined condition comprises the number of TLC-spare blocks being less than a first predetermined amount.

16. The data maintenance method as claimed in claim 12 , wherein when the first predetermined condition is not satisfied, the step of writing the data into the SLC-spare blocks further comprises:

consecutively writing the data into the SLC-spare blocks.

17. The data maintenance method as claimed in claim 12 , wherein the SLC-spare blocks are SLC blocks that do not have valid data, the SLC-data blocks are SLC blocks that have valid data, the TLC-spare blocks are TLC blocks that do not have valid data, and the TLC-data block are TLC blocks that have valid data.

18. A data maintenance method, applied to a data storage device having a flash memory, wherein the flash memory has a plurality of logical single level cell (SLC)-spare blocks, a plurality of logical SLC-data blocks, a plurality of triple logic cell (TLC)-spare blocks and a plurality of TLC-data blocks, the data maintenance method further comprising:

writing data into one of the logical SLC-spare blocks in response to a write command from a host, wherein when a first predetermined condition is satisfied, the step of writing data into one of the logical SLC-spare blocks further comprises:

selecting a part of the TLC-data blocks with the least amounts of valid data;

writing valid data stored in the part of the TLC-data blocks into one of the TLC-spare blocks; and

releasing the part of the TLC-data blocks wherein when the first predetermined condition is satisfied, the step of writing the data into the logical SLC-spare blocks further comprises:

writing a first part of the data into a first logical SLC-spare block of the logical SLC-spare blocks before selecting the part of the TLC-data blocks; and

mapping at least one logical address of the data to the written first logical SLC-spare block and defining the written first logical SLC-spare block mapped to the logical address as the logical SLC-data block, after releasing the part of the TLC-data blocks.

19. The data maintenance method as claimed in claim 18 , wherein the first predetermined condition comprises the number of TLC-spare blocks being less than a first predetermined amount.

20. The data maintenance method as claimed in claim 18 , wherein when the first predetermined condition is not satisfied, the step of writing the data into the SLC-spare blocks further comprises:

consecutively writing the data into one of the logical SLC-spare blocks.

21. The data maintenance method as claimed in claim 18 , wherein the logical SLC-spare blocks are SLC blocks that do not have valid data, the logical SLC-data blocks are SLC blocks that have valid data.

22. The data maintenance method as claimed in claim 18 , wherein the logical SLC-data blocks are simulated by the TLC-data blocks and the logical SLC-spare blocks are simulated by the TLC-spare blocks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2017
From: FAN, YU-WEI
To: SILICON MOTION, INC.
Reel/Frame 041293/0684 →
Priority Claims (1)
TW 105110255 A · Mar 31, 2016 · national
Continuity (1)
Related Publication 20170285954A1 · Oct 5, 2017