Controlling threshold voltage in nanosheet transistors
Embodiments are directed to a method of forming a semiconductor device and resulting structures for controlling a threshold voltage on a nanosheet-based transistor. A nanosheet stack is formed over a substrate. The nanosheet stack includes a first nanosheet vertically stacked over a second nanosheet. A tri-layer gate metal stack is formed on each nanosheet. The tri-layer gate metal stack includes an inner nitride layer formed on a surface of each nanosheet, a doped transition metal layer formed on each inner nitride layer, and an outer nitride layer formed on each doped transition metal layer.
1. A semiconductor device comprising:
a nanosheet stack over a substrate, the nanosheet stack comprising a first nanosheet vertically stacked over a second nanosheet;
an inner nitride layer on a surface of each nanosheet; and
a doped transition metal layer on each inner nitride layer formed from alternating pulses of a first precursor comprising a transition metal and a second precursor comprising an aluminum carbide.
2. The semiconductor device of claim 1 , wherein a ratio of transition metal to aluminum carbide in the doped transition metal layer is about 0.25 to 1.0.
3. The semiconductor device of claim 1 , wherein portions of the doped transition metal layers between the first and second nanosheets merge.
4. The semiconductor device of claim 1 , wherein the inner nitride layer comprises titanium nitride.
5. The semiconductor device of claim 4 , wherein a thickness of the inner nitride layer is about 1 to about 10 angstroms.
6. The semiconductor device of claim 1 , wherein the doped transition metal layer comprises aluminum doped transition metal carbide.
7. The semiconductor device of claim 6 , wherein the doped transition metal layer further comprises aluminum doped niobium carbide.
8. The semiconductor device of claim 7 , wherein a thickness of the doped transition metal layer is about 20 to about 35 angstroms.
9. A method for forming a semiconductor device, the method comprising:
forming a nanosheet stack over a substrate, the nanosheet stack comprising a first nanosheet vertically stacked over a second nanosheet; and
alternating pulses of a first precursor comprising a transition metal and a second precursor comprising an aluminum carbide to form a doped transition metal layer on each nanosheet of the nanosheet stack.
10. The method of claim 9 , wherein a duration of the pulse of the second precursor is increased while a duration of the pulse of the first precursor is held fixed to increase a concentration of aluminum in the doped transition metal layer.
11. The method of claim 10 , wherein increasing the duration of the pulse of the second precursor is operable to lower a threshold voltage.
12. The method of claim 9 , wherein a duration of the pulse of the second precursor is decreased while a duration of the pulse of the first precursor is held fixed to decrease a concentration of aluminum in the doped transition metal layer.
13. The method of claim 12 , wherein decreasing the duration of the pulse of the second precursor is operable to increase a threshold voltage.
14. The method of claim 9 , wherein a duration of the pulse of the second precursor is about 5 seconds to about 15 seconds.
15. The method of claim 9 , wherein a duration of the pulse of the first precursor is about 0.5 seconds to about 1 second.
16. A semiconductor device comprising:
a nanosheet stack over a substrate, the nanosheet stack comprising a first nanosheet vertically stacked over a second nanosheet; and
a doped transition metal layer on each nanosheet of the nanosheet stack formed from alternating pulses of a first precursor comprising a transition metal and a second precursor comprising an aluminum carbide.
17. The semiconductor device of claim 16 , wherein a ratio of transition metal to aluminum carbide in the doped transition metal layer is about 0.25 to 1.0.
18. The semiconductor device of claim 16 , wherein portions of the doped transition metal layers between the first and second nanosheets merge.
19. The semiconductor device of claim 16 , further comprising:
an inner nitride layer on a surface of each nanosheet; and
an outer nitride layer formed on the doped transition metal layer, wherein the inner nitride layer and the outer nitride layer comprise titanium nitride.
20. The semiconductor device of claim 19 , wherein a thickness of the inner nitride layer is about 1 to about 10 angstroms.