Transistor work function adjustment by laser stimulation
Methods and apparatuses for modifying a work function of transistors included in an integrated circuit are disclosed. A tester unit may be configured to test an integrated circuit that includes a plurality of circuit paths. The tester unit may be further configured to analyze the results from testing the integrated circuit and, based on the analysis, identify a circuit path that fails to meet a desired performance goal. A work function of a transistor included in the identified circuit path may be modified by the tester unit using an energy source external to the integrated circuit.
1. A system, comprising:
an integrated circuit including at least one memory circuit that includes a plurality of memory cells; and
an external energy source, wherein the external energy source modifies a work function of at least one transistor included in a given memory cell of the plurality of memory cells using at least a portion of received data to program data to the given memory cell.
2. The system of claim 1 , wherein to modify the work function of the at least one transistor included in the given memory cell, the external energy source increases a threshold voltage of the at least one transistor.
3. The system of claim 1 , wherein to modify the work function of the at least one transistor included in the given memory cell, external energy source causes a decrease in a threshold voltage of the at least one transistor.
4. The system of claim 1 , wherein a threshold voltage of the at least one transistor is set to a particular threshold voltage of a plurality of threshold voltages.
5. The system of claim 4 , wherein each threshold voltage of the plurality of threshold voltages corresponds to a particular combination of a plurality of data bits included in the data.
6. The system of claim 1 , wherein the external energy source includes a laser.
7. The system of claim 1 , further comprising a tester unit configured to test the memory circuit in response to a determination that the work function of the at least one transistor has been modified.
8. A method, comprising:
testing, by a tester unit, an integrated circuit including at least one memory circuit that includes a plurality of memory cells;
receiving, by the tester unit, data to be programmed in the at least one memory circuit; and
modifying, using an energy source external to the integrated circuit, a work function of at least one transistor included in a given memory cell of the plurality of memory cells using at least a portion of the data.
9. The method of claim 8 , wherein modifying the work function of the at least one transistor included in the given memory cell includes increasing a threshold voltage of the at least one transistor.
10. The method of claim 8 , wherein modifying the work function of the at least one transistor included in the given memory cell includes decreasing a threshold voltage of the at least one transistor.
11. The method of claim 8 , wherein modifying the work function of the at least one transistor includes setting a threshold voltage of the at least one transistor to a particular threshold voltage of a plurality of threshold voltages.
12. The method of claim 11 , wherein each threshold voltage of the plurality of threshold voltages corresponds to a particular combination of a plurality of data bits included in the data.
13. The method of claim 8 , further comprising testing the memory circuit in response to determining that the work function of the at least one transistor has been modified.
14. The method of claim 13 , further comprising re-modifying the work function of the at least one transistor based on results of testing the memory circuit.
15. A system, comprising:
an integrated circuit including at least one memory circuit that includes a plurality of memory cells; and
a tester unit configured to:
test the memory circuit;
determine at least one memory cell of the plurality of memory cells to adjust based on a comparison of test results to performance goals;
adjust the at least one memory cell using an energy source external to the integrated circuit; and
re-test the memory circuit.
16. The system of claim 15 , wherein to adjust the at least one memory cell, the tester unit is further configured to modify a work function of at least one transistor included in the at least one memory cell using the energy source external to the integrated circuit.
17. The system of claim 16 , wherein to modify the work function of the at least one transistor, the tester unit is further configured to increase a threshold voltage of the at least one transistor.
18. The system of claim 16 , wherein to modify the work function of the at least one transistor, the tester unit is further configured to decrease a threshold voltage of the at least one transistor.
19. The system of claim 15 , wherein to test the memory circuit, the tester unit is further configured to determine a sensitivity of the memory circuit to changes in a voltage level of a power supply signal coupled to the memory circuit.
20. The system of claim 15 , wherein the performance goals include a power consumption goal.