Semiconductor device and method for manufacturing semiconductor device
The present techniques relate to a semiconductor device having resistance which has a positive temperature coefficient and a suitable value, and to a method for manufacturing a semiconductor device having resistance which has a positive temperature coefficient and a suitable value. The semiconductor device related to the present techniques is a bipolar device in which a current flows through a pn junction. The semiconductor device includes an n-type silicon carbide drift layer, a p-type first silicon carbide layer formed on the silicon carbide drift layer, and a p-type second silicon carbide layer formed on the first silicon carbide layer. Then, the second silicon carbide layer has a positive temperature coefficient of resistance.
1. A semiconductor device which is a bipolar device in which a current flows through a pn junction, comprising:
a silicon carbide drift layer of a first conductivity type;
a first silicon carbide layer of a second conductivity type which is formed on said silicon carbide drift layer;
a second silicon carbide layer of the second conductivity type which is formed on said first silicon carbide layer; and
a third silicon carbide layer of the second conductivity type which is formed on said second silicon carbide layer, wherein
said second silicon carbide layer has a positive temperature coefficient of resistance,
said second silicon carbide layer has an impurity concentration which is lower than that of said first silicon carbide layer,
said third silicon carbide layer has an impurity concentration which is higher than that of said second silicon carbide layer, and
in said second silicon carbide layer, an impurity concentration of a region located on a side closer to said first silicon carbide layer is lower than that of a region located on a side closer to said third silicon carbide layer.
2. The semiconductor device according to claim 1 , wherein
a thickness of said second silicon carbide layer is equal to or larger than 0.01 μm, and is equal to or smaller than 4 μm.
3. The semiconductor device according to claim 1 , wherein
a concentration of impurities of the second conductivity type in said second silicon carbide layer is equal to or larger than 1×10 13 impurities/cm 3 and is equal to or smaller than 4×10 16 impurities/cm 3 .
4. The semiconductor device according to claim 3 , wherein
the concentration of the impurities of the second conductivity type in said second silicon carbide layer is equal to or smaller than 4×10 15 impurities/cm 3 .
5. The semiconductor device according to claim 1 , wherein
a thickness of said second silicon carbide layer is one-tenth or smaller of a thickness of said silicon carbide drift layer.