3D thin profile pre-stacking architecture using reconstitution method
Package on package structures and methods of manufacture are described. In various embodiments, DRAM die are integrated into various locations within a package on package structure, including within a bottom logic die package, as a co-package with a top NAND die package, and as a hybrid package structure between a top NAND die package and a bottom logic die package.
1. A package on package structure comprising:
a bottom package comprising:
a first level redistribution layer (RDL);
a first die attached to a top side of the first level RDL with a first plurality of solder bumps;
a first level molding compound encapsulating the first die on the top side of the first level RDL;
a second level RDL over the first die and the first level molding compound;
a second die attached to a top side of the second level RDL with a second plurality of solder bumps; and
a second level molding compound encapsulating the second die on the top side of the second level RDL, wherein a top side of the second level molding compound and a top side of the second die form a planar surface;
a top package mounted on the bottom package with a plurality of package solder bumps; and
an underfill material located between the bottom package and the top package, and laterally surrounding the plurality of package solder bumps, wherein the underfill material is formed directly on the top side of the second die.
2. The package on package structure of claim 1 , further comprising a first plurality of conductive pillars extending from the top side of the first level RDL to a bottom side of the second level RDL.
3. The package on package structure of claim 1 , further comprising a second plurality of conductive pillars extending from the top side of the second level RDL and through the second level molding compound.
4. The package on package structure of claim 3 , wherein the plurality of package solder bumps is bonded to the second plurality of conductive pillars.
5. The package on package structure of claim 1 , wherein the second level RDL is formed directly on a top side of the first die and a top side the first level molding compound.
6. The package on package structure of claim 1 , wherein the top package comprises a NAND die, and the second die is a DRAM die.
7. A package on package structure comprising:
a bottom package comprising:
a first level redistribution layer (RDL);
a first die on a top side of the first level RDL, wherein the first level RDL is formed directly on a metallic contact along a bottom side of the first die; and
a first level molding compound encapsulating the first die on the top side of the first level RDL; and
a top package mounted on the bottom package with a plurality of package solder bumps, wherein the top package comprises:
a top package RDL;
a second die attached to a bottom side of the top package RDL;
a lower molding compound encapsulating the second die on the bottom side of the top package RDL;
a third die attached to a top side of the top package RDL; and
a top package molding compound encapsulating the third die on the top side of the top package RDL;
wherein the plurality of package solder bumps extend through the lower molding compound.
8. The package on package structure of claim 7 , further comprising a first plurality of conductive pillars extending from the top side of the first level RDL and through the first level molding compound.
9. The package on package structure of claim 8 , wherein the plurality of package solder bumps is bonded to the first plurality of conductive pillars, and the plurality of package solder bumps extend from the bottom side of the top package RDL to the first plurality of conductive pillars.
10. The package on package structure of claim 7 , further comprising an underfill material located between the bottom package and the top package, and laterally surrounding the plurality of package solder bumps.
11. The package on package structure of claim 7 , wherein the second die is bonded to the top package RDL with solder bumps.
12. The package on package structure of claim 7 , wherein the second die is wire bonded to the top package RDL.
13. The package on package structure of claim 7 , wherein the second die is a DRAM die, and the third die is a NAND die.
14. A package on package structure comprising:
a bottom package comprising:
a first level redistribution layer (RDL);
a first die on a top side of the first level RDL, wherein the first level RDL is formed directly on a metallic contact along a bottom side of the first die;
a first level molding compound encapsulating the first die on the top side of the first level RDL; and
a second level RDL over the first die and the first level molding compound, wherein a top side of the first die is directly attached to a bottom side of the second level RDL with an adhesive layer;
a second die mounted on a top side of the second level RDL; and
a top package mounted on the bottom package with a plurality of package solder bumps, wherein the plurality of package solder bumps surround the second die, wherein the top package comprises:
a top package RDL;
a third die attached to a top side of the top package RDL; and
a top package molding compound encapsulating the third die on the top side of the top package RDL.
15. The package on package structure of claim 14 , further comprising a first plurality of conductive pillars extending from the top side of the first level RDL to the bottom side of the second level RDL.
16. The package on package structure of claim 15 , wherein the plurality of package solder bumps is bonded to the first plurality of conductive pillars.
17. The package on package structure of claim 14 , further comprising an underfill material located between the bottom package and the top package, and laterally surrounding the plurality of package solder bumps and the second die.
18. The package on package structure of claim 14 , further comprising a third molding compound encapsulating the top package, the plurality of package solder bumps, and the second die on the top side of the second level RDL.
19. The package on package structure of claim 14 , wherein the second die is a DRAM die, and third die is a NAND die.