Power semiconductor device
The present invention provides a semiconductor device comprising a substrate including an active region and an edge region and containing a semiconductor doped with impurities having a first conductivity type; an insulating film disposed on the edge region of the substrate; a field plate pattern disposed on the insulating film; and at least one first doped region having a second conductivity type buried in the edge region of the substrate and extending in a direction having a vector component parallel to an upper surface of the substrate.
1. A power semiconductor device comprising:
a substrate including an active region and an edge region and containing a semiconductor doped with impurities having a first conductivity type;
an insulating film disposed on the edge region of the substrate;
a field plate pattern disposed on the insulating film and connected to the substrate by penetrating through the insulating film; and
at least one first doped region having a second conductivity type buried in the edge region of the substrate and extending in a direction having a vector component parallel to an upper surface of the substrate,
wherein the substrate includes a trench in the active region of the substrate and a gate electrode is formed in the trench.
2. The device of claim 1 , wherein the first doped region having a second conductivity type extends in a direction parallel to the upper surface of the substrate.
3. The device of claim 1 , further comprising:
at least one second doped region having a second conductivity type and having a shape extending downward from the upper surface of the substrate in the substrate,
wherein the first doped region having a second conductivity type has a shape protruding laterally from the second doped region.
4. The device of claim 3 , wherein the first doped region is connected to the lower end of the second doped region and protrudes laterally.
5. The device of claim 3 , wherein the first doped region is disposed below and spaced apart from the second doped region.
6. The device of claim 3 ,
wherein the least one second doped region having a second conductivity type includes a plurality of second doped regions having a second conductivity type arranged spaced apart from each other, and
wherein the at least one first doped region having a second conductivity type includes a plurality of first doped regions having a second conductivity type arranged spaced apart from each other and each having a shape protruding laterally from the second doped region.
7. The device of claim 6 , wherein a spacing between one of the plurality of second doped regions and the immediately adjacent one of the second doped regions becomes larger as the second doped regions are disposed further away from the active region.
8. The device of claim 1 ,
wherein a voltage distribution in a direction perpendicular to the upper surface of the substrate has a voltage reversal section between a first surface penetrating the first doped region in a direction parallel to the upper surface of the substrate and a second surface penetrating the second doped region in a direction parallel to the upper surface of the substrate and disposed above the first surface such that the lowest voltage is generated on the first surface.
9. The method of claim 8 , wherein, with the voltage reversal section formed, an electric field is generated in a direction from the second surface to the first surface at an interface between the substrate containing the semiconductor doped with impurities having a first conductivity type and the insulating film.
10. The device of claim 4 ,
wherein the least one second doped region having a second conductivity type includes a plurality of second doped regions having a second conductivity type arranged spaced apart from each other, and
wherein the at least one first doped region having a second conductivity type includes a plurality of first doped regions having a second conductivity type arranged spaced apart from each other and each having a shape protruding laterally from the second doped region.
11. The device of claim 5 ,
wherein the least one second doped region having a second conductivity type includes a plurality of second doped regions having a second conductivity type arranged spaced apart from each other, and
wherein the at least one first doped region having a second conductivity type includes a plurality of first doped regions having a second conductivity type arranged spaced apart from each other and each having a shape protruding laterally from the second doped region.
12. The device of claim 2 ,
wherein a voltage distribution in a direction perpendicular to the upper surface of the substrate has a voltage reversal section between a first surface penetrating the first doped region in a direction parallel to the upper surface of the substrate and a second surface penetrating the second doped region in a direction parallel to the upper surface of the substrate and disposed above the first surface such that the lowest voltage is generated on the first surface.
13. The device of claim 3 ,
wherein a voltage distribution in a direction perpendicular to the upper surface of the substrate has a voltage reversal section between a first surface penetrating the first doped region in a direction parallel to the upper surface of the substrate and a second surface penetrating the second doped region in a direction parallel to the upper surface of the substrate and disposed above the first surface such that the lowest voltage is generated on the first surface.
14. The device of claim 4 ,
wherein a voltage distribution in a direction perpendicular to the upper surface of the substrate has a voltage reversal section between a first surface penetrating the first doped region in a direction parallel to the upper surface of the substrate and a second surface penetrating the second doped region in a direction parallel to the upper surface of the substrate and disposed above the first surface such that the lowest voltage is generated on the first surface.
15. The device of claim 5 ,
wherein a voltage distribution in a direction perpendicular to the upper surface of the substrate has a voltage reversal section between a first surface penetrating the first doped region in a direction parallel to the upper surface of the substrate and a second surface penetrating the second doped region in a direction parallel to the upper surface of the substrate and disposed above the first surface such that the lowest voltage is generated on the first surface.