IP Library › Granted Patent US 10,181,550
Granted Patent B2
US 10,181,550 · App. 15/628,195 · Granted Jan 15, 2019

Method for fabricating high-efficiency light emitting diode having light emitting window electrode structure

Inventors: Tae Yeon Seong (Seoul, KR); Ki Seok Kim (Hwaseong-si, KR); Hwan Kyo Kim (Incheon, KR); Dae-Hyun Kim (Seoul, KR)
Assignee: Korea University Research and Business Foundation
H01L33/32H01L33/007H01L33/36H01L33/38H01L33/387H01L33/20H01L2933/0016
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Quick Facts
Patent No.
US 10,181,550
App. No.
15/628,195
Granted
Jan 15, 2019
Kind
B2
Abstract

A lateral light emitting diode device includes: a substrate; an n-type GaN layer disposed on the substrate; an activation layer disposed on the n-type GaN layer; a p-type GaN layer disposed on the activation layer; a current spreading layer disposed on the p-type GaN layer; a p-electrode disposed on the current spreading layer; a MESA region formed by removing portions of the current spreading layer, the p-type GaN layer, the activation layer, and the n-type GaN layer; a transparent window layer disposed on the n-type GaN layer in the entire or part of the MESA region; a plurality of contact plugs which is in contact with the n-type GaN layer through the transparent window layer; and an n-electrode disposed on the transparent window layer to connect the plurality of contact plugs to each other.

Claims (49)

1. A lateral light emitting diode device comprising:

a substrate;

an n-type GaN layer on the substrate;

an emission region comprising:

an activation layer on the n-type GaN layer,

a p-type GaN layer on and vertically aligned the activation layer, and

a current spreading layer on and vertically aligned with the p-type GaN layer;

a p-electrode on the current spreading layer;

a transparent window layer on the n-type GaN layer in a MESA region of the lateral light emitting diode device;

a plurality of contact plugs in contact with the n-type GaN layer through the transparent window layer; and

an n-electrode on the transparent window layer to connect the plurality of contact plugs to each other,

wherein the n-electrode and the MESA region extend in a first direction, the plurality of contact plugs are arranged in the first direction, and a distance between adjacent ones of the contact plugs sequentially decreases proceeding in the first direction.

2. The lateral light emitting diode device as set forth in claim 1 , wherein:

a top surface of the transparent window layer is higher than the current spreading layer.

3. The lateral light emitting diode device as set forth in claim 1 , further comprising at least one of:

an insulating sidewall on a side surface of the transparent window at the boundary of the MESA region and the emission region; and

a seed layer between the n-type GaN layer and the transparent window layer.

4. The lateral light emitting diode device as set forth in claim 3 , wherein:

the transparent window layer includes at least one selected from the group consisting of zinc oxide (ZnO), zirconium oxide (ZrO 2 ), titanium oxide (TiO 2 ), chromium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium oxide (In 2 O 3 ), tin oxide (SnO 2 ), silicon oxide (SiO 2 ), magnesium fluoride (MgF 2 ), and a combination thereof.

5. The lateral light emitting diode device as set forth in claim 1 , wherein:

the transparent window layer has a multilayer structure having a sequentially reduced refractive index.

6. The lateral light emitting diode device as set forth in claim 1 , wherein:

the MESA region includes a peripheral MESA region covering part of the emission region and an n-electrode MESA region crossing part of the emission region, and

the transparent window layer is only in the n-electrode MESA region.

7. The lateral light emitting diode device as set forth in claim 1 , further comprising:

an insulating sidewall on a side surface of the transparent window at the boundary of the MESA region and the emission region; and

a seed layer between the n-type GaN layer and the transparent window layer.

8. The lateral light emitting diode device as set forth in claim 1 , wherein the transparent window layer comprises a metal oxide.

9. The lateral light emitting diode device as set forth in claim 1 , wherein the transparent window layer comprises a multilayer structure in which each sequential layer has a smaller refractive index.

10. The lateral light emitting diode device as set forth in claim 9 , wherein the multilayer structure comprises ZnO, indium tin oxide (ITO), silicon nitride and/or a silicon oxide.

11. The lateral light emitting diode device as set forth in claim 9 , wherein the multilayer structure comprises, in sequence, ZnO, indium tin oxide (ITO), silicon nitride and a silicon oxide.

12. The lateral light emitting diode device as set forth in claim 1 , wherein the MESA region includes an n-electrode MESA region crossing part of the emission region, and the transparent window layer is in the n-electrode MESA region.

13. The lateral light emitting diode device as set forth in claim 1 , wherein the substrate has a crystal structure and orientation similar to the n-type GaN layer, the activation layer and the p-type GaN layer, and is configured to epitaxially grow the n-type GaN layer, the activation layer, and the p-type GaN layer.

14. The lateral light emitting diode device as set forth in claim 1 , wherein the substrate comprises sapphire, silicon carbide (SiC), aluminum nitride (AlN), aluminum oxide (Al 2 O 3 ), or silicon.

15. The lateral light emitting diode device as set forth in claim 1 , further comprising a buffer layer on the substrate, wherein the buffer layer reduces a difference in a grating constant between the substrate and the n-type GaN layer and/or relieves stress between the substrate and the n-type GaN layer.

16. A lateral light emitting diode device comprising:

a substrate;

an emission region comprising:

an n-type GaN layer on the substrate;

an activation layer on the n-type GaN layer;

a p-type GaN layer on the activation layer;

a current spreading layer on the p-type GaN layer;

a p-electrode on the current spreading layer;

a transparent window layer on the n-type GaN layer in a MESA region of the lateral light emitting diode device, wherein the transparent window layer has a multilayer structure having a sequentially reduced refractive index;

a plurality of contact plugs in contact with the n-type GaN layer through the transparent window layer; and

an n-electrode on the transparent window layer to connect the plurality of contact plugs to each other.

17. The lateral light emitting diode device as set forth in claim 16 , wherein the multilayer structure comprises ZnO, indium tin oxide (ITO), silicon nitride and/or a silicon oxide.

18. The lateral light emitting diode device as set forth in claim 16 , wherein the multilayer structure comprises, in sequence, ZnO, indium tin oxide (ITO), silicon nitride and a silicon oxide.

19. The lateral light emitting diode device as set forth in claim 16 , wherein the transparent window layer has a top surface that is higher than a top surface of the current spreading layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2017
From: SEONG, TAE YEON; KIM, KI SEOK; KIM, HWAN KYO; KIM, DAE-HYUN
To: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
Reel/Frame 042772/0248 →
Priority Claims (1)
KR 10-2016-0088903 · Jul 13, 2016 · national
Continuity (1)
Related Publication 20180019378A1 · Jan 18, 2018