IP Library Granted Patent US 10,181,850
Granted Patent B2
US 10,181,850 · App. 15/970,778 · Granted Jan 15, 2019

High throw-count RF switch

Inventors: Eric S. Shapiro (San Diego, CA); Payman Shanjani (San Diego, CA)
Assignee: pSemi Corporation
H03K17/693H03K17/62H03K17/76H04B1/0458H04B1/48H03K2017/066H04B2001/485
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Quick Facts
Patent No.
US 10,181,850
App. No.
15/970,778
Granted
Jan 15, 2019
Kind
B2
Abstract

A high throw-count multiple-pole FET-based RF switch architecture that provides good RF performance in terms of insertion loss, return loss, isolation, linearity, and power handling. A common port RFC is coupled along a common path to multiple ports RFn. Embodiments introduce additional common RF path branch isolation switches which are controlled by state dependent logic. The branch isolation switches help to isolate the unused branch ports RFn and the unused portion of the common path from the active portion of the common path, and thereby reduce the reactive load attributable to such branches that degrades RF performance of the ports RFn “closer” to the common port RFC. The branch isolation switches can also be used to reconfigure the switch architecture for a multiplex function as well as separate switch path banks for re-configurability of purpose, tuning, or varying switch throw counts and packaging options.

Claims (32)

1. A high throw-count multiple-pole RF switch including:

(a) a common path;

(b) a common port coupled to the common path;

(c) a plurality of sections each containing at least one signal port coupled to the common path through a series-shunt switching element; and

(d) at least one isolation switch connected to the common path between two adjacent sections;

wherein when a selected signal port is coupled to the common port, any isolation switches between the selected signal port and the common port are configured in a conducting state and all other isolation switches are configured in a blocking state.

2. The high throw-count multiple-pole RF switch of claim 1 , wherein the common port is coupled between the ends of the common path to define at least two groups of sections.

3. The high throw-count multiple-pole RF switch of claim 1 , wherein at least one isolation switch is a FET.

4. The high throw-count multiple-pole RF switch of claim 1 , wherein at least one isolation switch comprises a stack of FETs.

5. The high throw-count multiple-pole RF switch of claim 1 , wherein at least one isolation switch is selected from one of a bipolar junction transistor, a PIN diode, or a microelectromechanical system switch.

6. The high throw-count multiple-pole RF switch of claim 1 , wherein at least one series-shunt switching element comprises (1) a series FET coupled between a corresponding signal port and the common path, and (2) a shunt FET coupled between such corresponding signal port and circuit ground.

7. The high throw-count multiple-pole RF switch of claim 1 , wherein the common port is unconnected and the RF switch is configured to operate as a matrix switch allowing connection of a selected signal port to any of a selected group of other signal ports.

8. The high throw-count multiple-pole RF switch of claim 1 , wherein at least one series-shunt switching element is a high-isolation series-shunt switching element.

9. The high throw-count multiple-pole RF switch of claim 8 , wherein the at least one high-isolation series-shunt switching element includes an absorptive termination circuit.

10. The high throw-count multiple-pole RF switch of claim 1 , further including a termination circuit operatively coupled to the common port.

11. A method for switching between multiple RF signal ports, including:

(a) providing a common path;

(b) coupling a common port to the common path;

(c) coupling a plurality of sections each containing at least one signal port to the common path through a series-shunt switching element;

(d) coupling at least one isolation switch to the common path between two adjacent sections;

(e) coupling a selected signal port to the common port;

(f) setting any branch isolation switches between the selected signal port and the common port to a conducting state; and

(g) setting all other branch isolation switches to a blocking state.

12. The method of claim 11 , wherein the common port is coupled between the ends of the common path to define at least two groups of sections.

13. The method of claim 11 , wherein at least one isolation switch is a FET.

14. The method of claim 11 , wherein at least one isolation switch comprises a stack of FETs.

15. The method of claim 11 , wherein at least one isolation switch is selected from one of a bipolar junction transistor, a PIN diode, or a microelectromechanical system switch.

16. The method of claim 11 , wherein at least one series-shunt switching element comprises (1) a series FET coupled between a corresponding signal port and the common path, and (2) a shunt FET coupled between such corresponding signal port and circuit ground.

17. The method of claim 11 , further including disconnecting the common port and operating the RF switch as a matrix switch allowing connection of a selected signal port to any of a selected group of other signal ports.

18. The method of claim 11 , wherein at least one series-shunt switching element is a high-isolation series-shunt switching element.

19. The method of claim 18 , wherein the at least one high-isolation series-shunt switching element includes an absorptive termination circuit.

20. The method of claim 11 , further including a termination circuit operatively coupled to the common port.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2025
From: SHAPIRO, ERIC S.; SHANJANI, PAYMAN
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 071866/0252 →
CHANGE OF NAME Recorded Jul 29, 2025
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 072261/0032 →
Continuity (2)
Division 15019882 · Feb 9, 2016
Related Publication 20180254777A1 · Sep 6, 2018