Gate driver, a display apparatus having the gate driver and a method of driving the display apparatus

1. A gate driver, comprising:

a first shift-register comprising a plurality of odd-numbered stages, wherein the first shift-register outputs a plurality of odd-numbered original gate signals in synchronization with a first gate clock signal, wherein each of the odd-numbered original gate signals has a pre-charge pulse and a main-charge pulse;

a second shift-register comprising a plurality of even-numbered stages, wherein the second shift-register outputs a plurality of even-numbered original gate signals in synchronization with a second gate clock signal, wherein each of the even-numbered original gate signals has a pre-charge pulse and a main-charge pulse;

a first inverter configured to output a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal;

a second inverter configured to output a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal;

a first AND-circuit configured to perform an AND operation on a first odd-numbered original gate signal of the odd-numbered original gate signals and the first inversion pre-charge control signal;

a second AND-circuit configured to perform the AND operation on a second odd-numbered original gate signal of the odd-numbered original gate signals and the second inversion pre-charge control signal;

a third AND-circuit configured to perform an AND operation on a first even-numbered original gate signal of the even-numbered original gate signals and the first inversion pre-charge control signal; and

a fourth AND-circuit configured to perform the AND operation on a second even-numbered original gate signal of the even-numbered original gate signals and the second inversion pre-charge control signal.

2. A display apparatus, comprising:

a display panel comprising a plurality of pixels arranged in a plurality of pixel rows and a plurality of pixel columns, and a plurality of horizontal lines corresponding to the plurality of pixel rows;

a control data generator configured to generate pre-charge control data of an N-th horizontal line by comparing image data of an (N−2)-th horizontal line and image data of the N-th horizontal line (‘N’ is a natural number);

a pre-charge controller configured to generate a pre-charge control signal based on the pre-charge control data; and

a gate driver configured to generate an N-th gate signal having at least one of a pre-charge pulse and a main-charge pulse, wherein the main-charge pulse is delayed from the pre-charge pulse by one horizontal period, and gate drive is configured to control the pre-charge pulse of the N-th gate signal based on the pre-charge control signal such that the pre-charge pulse of the N-th gate signal is not generated when the comparison of the image data of the (N−2)-th horizontal line and the image data of the N-th horizontal line is indicative of a ghost condition.

3. The display apparatus of claim 2 , wherein the control data generator is configured to calculate comparison data of the N-th horizontal line using the image data of the N-th horizontal line and calculate comparison data of the (N−2)-th horizontal line using the image data of the (N−2)-th horizontal line, and

to determine the pre-charge control data as high data if the comparison data of the N-th and (N−2)-th horizontal lines have the ghost condition and determine the pre-charge control data as low data if the comparison data of the N-th and (N−2)-th horizontal lines do not have the ghost condition.

4. The display apparatus of claim 3 , wherein the comparison data comprise average data of image data of a horizontal line, a high-number data counting number of the image data of the horizontal line being higher than a high threshold grayscale, and a low-number data counting number of the image data of the horizontal line being lower than a low threshold grayscale.

5. The display apparatus of claim 2 , wherein the gate driver comprises:

a shift-register comprising a plurality of stages, wherein the shift register generates a plurality of original gate signals synchronized with a gate clock signal in response to a vertical synchronization signal, wherein each of the original gate signals has a pre-charge pulse and a main-charge pulse;

a first inverter configured to output a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal, wherein the first pre-charge control signal controls a pre-charge pulse of an odd-numbered original gate signal provided from an odd-numbered stage of the plurality of stages;

a second inverter configured to output a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal, wherein the second pre-charge control signal controls a pre-charge pulse of an even-numbered original gate signal provided from an even-numbered stage of the plurality of stages;

a first AND circuit configured to perform an AND operation on the odd-numbered original gate signal and the first inversion pre-charge control signal; and

a second AND circuit configured to perform an AND operation on the even-numbered original gate signal and the second inversion pre-charge control signal.

6. The display apparatus of claim 2 , wherein the gate driver comprises:

a first shift-register comprising a plurality of odd-numbered stages, wherein the first shift-register outputs a plurality of odd-numbered original gate signals in synchronization with a first gate clock signal, wherein each of the odd-numbered original gate signals has a pre-charge pulse and a main-charge pulse; and

a second shift-register comprising a plurality of even-numbered stages, wherein the second shift-register outputs a plurality of even-numbered original gate signals in synchronization with a second gate clock signal, wherein each of the even-numbered original gate signal has a pre-charge pulse and a main-charge pulse.

7. The display apparatus of claim 6 , wherein the gate driver further comprises:

a first inverter configured to output a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal;

a second inverter configured to output a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal;

a first AND circuit configured to perform an AND operation on a first odd-numbered original gate signal of the odd-numbered original gate signals and the first inversion pre-charge control signal;

a second AND circuit configured to perform the AND operation on a second odd-numbered original gate signal of the odd-numbered original gate signals and the second inversion pre-charge control signal;

a third AND circuit configured to perform the AND operation on a first even-numbered original gate signal of the even-numbered original gate signals and the first inversion pre-charge control signal; and

a fourth AND circuit configured to perform the AND operation on a second even-numbered original gate signal of the even-numbered original gate signals and the second inversion pre-charge control signal.

8. A method of driving a display apparatus which comprises a plurality of pixels arranged in a plurality of pixel rows and a plurality of pixel columns and a plurality of horizontal lines corresponding to the plurality of pixel rows, the method comprising:

generating pre-charge control data of an N-th horizontal line by comparing image data of an (N−2)-th horizontal line and image data of the N-th horizontal line (‘N’ is a natural number);

generating a pre-charge control signal based on the pre-charge control data of the N-th horizontal line;

generating an N-th gate signal having a pre-charge pulse and a main-charge pulse delayed from the pre-charge pulse by one horizontal period; and

omitting the pre-charge pulse of the N-th gate signal corresponding to the N-th horizontal line based on the pre-charge control signal which is indicative of a ghost condition.

9. The method of claim 8 , further comprising:

calculating comparison data of the N-th horizontal line using the image data of the N-th horizontal line;

calculating comparison data of the (N−2)-th horizontal line using the image data of the (N−2)-th horizontal line; and

determining the pre-charge control data as high data if the comparison data of the N-th and (N−2)-th horizontal lines have the ghost condition and determining the pre-charge control data as low data if the comparison data of the N-th and (N−2)-th horizontal lines do not have the ghost condition.

10. The method of claim 9 , wherein the comparison data comprise average data of image data of a horizontal line, a high-number data counting number of the image data of the horizontal line being higher than a high threshold grayscale, and a low-number data counting number of the image data of the horizontal line being lower than a low threshold grayscale.

11. The method of claim 8 , further comprising:

generating a plurality of original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a gate clock signal in response to a vertical synchronization signal;

outputting a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal;

outputting a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal;

performing an AND operation on the odd-numbered original gate signal and the first inversion pre-charge control signal; and

performing the AND operation on the even-numbered original gate signal and the second inversion pre-charge control signal.

12. The method of claim 8 , further comprising:

outputting a plurality of odd-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a first gate clock signal; and

outputting a plurality of even-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a second gate clock signal.

13. The method of claim 12 , further comprising:

outputting a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal, wherein the first pre-charge control signal controls a first odd-numbered original gate signal of the odd-numbered original gate signals and a first even-numbered original gate signal of the even-numbered original gate signals;

outputting a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal, wherein the second pre-charge control signal controls a second odd-numbered original gate signal of the odd-numbered original gate signals and a second even-numbered original gate signal of the even-numbered original gate signals;

performing a first AND operation on the first odd-numbered original gate signal and the first inversion pre-charge control signal;

performing a second AND operation on the second odd-numbered original gate signal and the second inversion pre-charge control signal;

performing a third AND operation on the first even-numbered original gate signal and the first inversion pre-charge control signal; and

performing a fourth AND operation on the second even-numbered original gate signal and the second inversion pre-charge control signal.

14. A display apparatus, comprising:

a timing controller configured to generate pre-charge control data of an N-th signal line by comparing image data of an (N−2)-th signal line and image data of the N-th signal line (‘N’ is a natural number), and to generate a pre-charge control signal based on the pre-charge control data; and

a gate driver configured to generate an N-th gate signal having a pre-charge pulse and a main-charge pulse delayed from the pre-charge pulse by a first time period, and to control the pre-charge pulse of the N-th gate signal based on the pre-charge control signal by inverting the pre-charge control signal and performing a logical operation on the inverted pre-charge control signal and an original N-th gate signal.

15. The display apparatus of claim 14 , wherein the timing controller is configured to calculate comparison data of the N-th signal line using the image data of the N-th signal line, calculate comparison data of the (N−2)-th signal line using the image data of the (N−2)-th horizontal line, determine the pre-charge control data as high data if the comparison data of the N-th and (N−2)-th signal lines satisfy a first condition and determine the pre-charge control data as low data if the comparison data of the N-th and (N−2)-th signal lines do not satisfy the first condition.

16. The display apparatus of claim 15 , wherein the first condition is a ghost condition.

17. The display apparatus of claim 14 , wherein the signal lines are horizontal lines of a display panel.