Patterning for substrate fabrication
Various examples of a technique for forming a pattern for substrate fabrication are disclosed herein. In an example, a method includes receiving a substrate. A patterned resist is formed on the substrate and has a trench defined therein. A dielectric is deposited on the patterned resist and within the trench such that the dielectric narrows a width of the trench to further define the trench. A fabrication process is performed on a region of the substrate underlying the trench defined by the dielectric.
1. A method comprising:
receiving a substrate;
forming a patterned resist on the substrate, wherein the patterned resist has a trench defined therein;
depositing a dielectric on the patterned resist and within the trench such that the dielectric narrows a width of the trench to further define the trench, wherein the depositing of the dielectric is performed at a temperature between about 20° C. and about 100° C.; and
performing a fabrication process on a region of the substrate underlying the trench defined by the dielectric.
2. The method of claim 1 , wherein:
the fabrication process includes an ion-implantation process; and
a thickness of the dielectric at a bottom of the trench permits the ion-implantation process to implant the region of the substrate through the dielectric.
3. The method of claim 2 , wherein the ion-implantation process forms a junction isolation region within the substrate.
4. The method of claim 3 , wherein the junction isolation region isolates a set of pixel regions of an image sensor.
5. The method of claim 1 , wherein the depositing of the dielectric includes a technique from a group consisting of catalyst enhanced chemical vapor deposition and plasma enhanced chemical vapor deposition.
6. The method of claim 1 , wherein the depositing of the dielectric is configured to deposit the dielectric substantially conformally within the trench.
7. The method of claim 1 , wherein the trench having the narrowed width has a height-to-width ratio of greater than or equal to 13.
8. The method of claim 7 , wherein the trench prior to the depositing of the dielectric has a height-to-width ratio of less than or equal to 10.
9. The method of claim 1 , wherein the patterned resist includes a photoresist material and the dielectric physically contacts the photoresist material.
10. The method of claim 9 , wherein the depositing of the dielectric is configured such that the deposited dielectric physically contacts a top surface and opposing side surfaces of the photoresist material.
11. The method of claim 10 , wherein the depositing of the dielectric is configured such that the deposited dielectric further physically contacts the substrate, the method further comprising removing a portion of the dielectric from the substrate prior to the performing of the fabrication process.
12. A method comprising:
receiving a substrate;
depositing a resist material on the substrate;
patterning the resist material to form a first feature and a second feature with a trench disposed therebetween;
depositing a dielectric within the trench, wherein the trench after the depositing of the dielectric has a height-to-width ratio of greater than or equal to 13; and
performing a fabrication process on the substrate using the trench having the dielectric deposited therein.
13. The method of claim 12 , wherein:
the fabrication process is performed on a first region of the substrate; and
the resist material and a first portion of the dielectric on a sidewall of the trench are configured to protect a second region of the substrate from the fabrication process.
14. The method of claim 13 , wherein:
the fabrication process includes an ion-implantation process; and
a second portion of the dielectric on a bottom of the trench above the first region of the substrate is configured to implant the first region of the substrate through the dielectric.
15. The method of claim 13 , wherein:
the fabrication process includes an ion-implantation process; and
the ion-implantation process forms a junction isolation region within the substrate.
16. The method of claim 15 , wherein the junction isolation region isolates a set of pixel regions of an image sensor.
17. The method of claim 12 , wherein the depositing of the dielectric is performed at a temperature between about 20° C. and about 100° C.
18. The method of claim 12 , wherein the depositing of the dielectric includes a technique from a group consisting of catalyst enhanced chemical vapor deposition and plasma enhanced chemical vapor deposition.
19. A method comprising:
receiving a substrate;
patterning a first resist on the substrate to form a first feature;
depositing a dielectric on a side surface of the first feature;
depositing a second resist on the substrate to form a second feature separated from the first feature by the dielectric;
selectively removing the dielectric to form a trench between the first feature and the second feature; and
selectively processing a portion of the substrate exposed by the trench, wherein the selectively processing includes:
performing an ion-implantation process on the portion of the substrate exposed by the trench to form a junction isolation region the portion that isolates a set of pixel regions of an image sensor.
20. The method of claim 19 , wherein the dielectric is a first dielectric, the trench is a first trench, and the first trench extends in a first direction, the method further comprising:
patterning a third resist on the substrate to form a third feature;
depositing a second dielectric on a side surface of the third feature;
depositing a fourth resist on the substrate to form a fourth feature separated from the third feature by the second dielectric;
selectively removing the second dielectric to form a second trench between the third feature and the fourth feature, wherein the second trench extends in a second direction substantially perpendicular to the first direction; and
selectively processing the substrate exposed by the second trench.