IP Library Granted Patent US 10,187,182
Granted Patent B2
US 10,187,182 · App. 15/393,378 · Granted Jan 22, 2019

Integrated circuit, radio communication apparatus, and method

Inventors: Kentaro Taniguchi (Kanagawa, JP); Tsuguhide Aoki (Kanagawa, JP)
Assignee: KABUSHIKI KAISHA TOSHIBA
H04L1/08H04L1/005H04L1/0045H04L1/0054H04L1/0055H04L1/0061H04L1/1864
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Quick Facts
Patent No.
US 10,187,182
App. No.
15/393,378
Granted
Jan 22, 2019
Kind
B2
Abstract

According to one embodiment, an integrated circuit receives first packet scrambled with a first scrambling seed and second packet scrambled with a second scrambling seed, generates inversion data, generate third likelihood information by inverting signs of the first likelihood information or the second likelihood information based on the inversion data, and generates fourth likelihood information based on the third likelihood information and the second or first likelihood information.

Claims (64)

1. An integrated circuit comprising:

an input terminal configured to receive a radio wave of first packet data scrambled with a first scrambling seed and a radio wave of second packet data scrambled with a second scrambling seed through at least one antenna; and

a baseband integrated circuit configured to:

receive a signal of the first packet data and a signal of the second packet data;

generate inversion data in order to convert the first packet data into first scrambled data scrambled with the second scrambling seed or in order to convert the second packet data into second scrambled data scrambled with the first scrambling seed;

generate third likelihood information by inverting signs of one of first likelihood information of the first packet data or second likelihood information of the second packet data based on the inversion data; and

generate fourth likelihood information based on the third likelihood information and the other of the first likelihood information or the second likelihood information.

2. The integrated circuit of claim 1 , wherein

the baseband integrated circuit is configured to request transmission of the second packet data when a decoded result of the first likelihood information comprises an error.

3. The integrated circuit of claim 1 , wherein

the first packet data comprises data resulting from scrambling transmitted data by a first scrambling circuit, wherein the first scrambling seed is set to the first scrambling circuit; and

the second packet data comprises data resulting from scrambling transmitted data by the first scrambling circuit, wherein the second scrambling seed is set to the first scrambling circuit.

4. The integrated circuit of claim 3 , wherein

the baseband integrated circuit comprises a second scrambling circuit, wherein a third scrambling seed is set to the second scrambling circuit and a structure of the second scrambling circuit and a structure of the first scrambling circuit are the same.

5. The integrated circuit of claim 4 , wherein

the first packet data comprises data obtained by encoding an output of the first scrambling circuit by a first error correction coding circuit, wherein the first scrambling seed is set to the first scrambling circuit;

the second packet data comprises data obtained by encoding an output of the first scrambling circuit by the first error correction coding circuit, wherein the second scrambling seed is set to the first scrambling circuit; and

the baseband integrated circuit comprises a second error correction coding circuit configured to encode an output of the second scrambling circuit wherein a function of the second error correction coding circuit and a function of the first error correction coding circuit are the same.

6. The integrated circuit of claim 4 , wherein

the third scrambling seed comprises an exclusive OR value of the first scrambling seed and the second scrambling seed.

7. The integrated circuit of claim 1 , wherein

the baseband integrated circuit is configured to add the third likelihood information to the other of the first likelihood information or the second likelihood information.

8. The integrated circuit of claim 1 , wherein

the baseband integrated circuit is configured to select one of the third likelihood information and the other of the first likelihood information or the second likelihood information.

9. The integrated circuit of claim 1 , wherein

the baseband integrated circuit is further configured to cause a memory to store at least one of the first likelihood information or the second likelihood information.

10. The integrated circuit of claim 9 , wherein

the baseband integrated circuit is further configured to cause the memory to store the fourth likelihood information when a decoding result of the fourth likelihood information comprises an error.

11. The integrated circuit of claim 1 , wherein

the baseband integrated circuit is further configured to receive the signal of the first packet data and the signal of the second packet data through a radio frequency integrated circuit, and

the baseband integrated circuit and the radio frequency integrated circuit are integrated into a single integrated circuit.

12. The integrated circuit of claim 1 , further comprising

the at least one antenna, and

a radio frequency integrated circuit configured to be coupled to the at least one antenna,

wherein, the baseband integrated circuit is configured to receive the first packet data and the second packet data through the radio frequency integrated circuit.

13. A radio communication apparatus comprising:

at least one antenna;

radio circuitry configured to transmit and receive a frame through the at least one antenna;

a memory; and

controller circuitry configured to

receive, through the radio device, a signal of first packet data scrambled with a first scrambling seed and a signal of second packet data scrambled with a second scrambling seed;

generate inversion data in order to convert the first packet data into fir t scrambled data scrambled with the second scrambling seed or in order to convert the second packet data into second scrambled data scrambled with the first scrambling seed;

generate third likelihood information by inverting signs of one of first likelihood information of the first packet or second likelihood information of the second packet based on the inversion data; and

generate fourth likelihood information based on the third likelihood information and the other of the first likelihood information or the second likelihood information.

14. The radio communication apparatus of claim 13 , wherein

the baseband integrated circuit is configured to request transmission of the second packet data when a decoded result of the first likelihood information comprises an error.

15. The radio communication apparatus of claim 13 , wherein

the first packet data comprises data resulting from scrambling transmitted data by a first scrambling circuit, wherein the first scrambling seed is set to the first scrambling circuit; and

the second packet data comprises data resulting from scrambling transmitted data by the first scrambling circuit, wherein the second scrambling seed is set to the first scrambling circuit.

16. The radio communication apparatus of claim 13 , wherein

the baseband integrated circuit is configured to add the third likelihood information to the other of the first likelihood information or the second likelihood information.

17. The radio communication apparatus of claim 13 , wherein

the baseband integrated circuit is configured to select one of the third likelihood information and the other of the first likelihood information or the second likelihood information.

18. The radio communication apparatus of claim 13 , wherein

the baseband integrated circuit is further configured to cause a memory to store at least one of the first likelihood information or the second likelihood information.

19. The radio communication apparatus of claim 13 , wherein

the baseband integrated circuit is further configured to receive the signal of the first packet data and the signal of the second packet data through a radio frequency integrated circuit, and

the baseband integrated circuit and the radio frequency integrated circuit are integrated into a single integrated circuit.

20. A method comprising:

receiving a signal of first packet data scrambled with a first scrambling seed though an antenna;

receiving a signal of second packet data scrambled with a second scrambling seed though the antenna;

generating inversion data in order to convert the first packet data into first scrambled data scrambled with the second scrambling seed or in order to convert the second packet data into second scrambled data scrambled with the first scrambling seed;

generating third likelihood information by inverting signs of one of first likelihood information of the first packet or second likelihood information of the second packet based on the inversion data; and

generating fourth likelihood information based on the third likelihood information and the other of the first likelihood information or the second likelihood information.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2017
From: TANIGUCHI, KENTARO; AOKI, TSUGUHIDE
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 043432/0261 →
Priority Claims (1)
JP 2016-039825 · Mar 2, 2016 · national
Continuity (1)
Related Publication 20170257188A1 · Sep 7, 2017