IP Library Granted Patent US 10,191,344
Granted Patent B2
US 10,191,344 · App. 15/528,498 · Granted Jan 29, 2019

Active matrix substrate and display panel

Inventors: Takeshi Noma (Sakai, JP); Kohhei Tanaka (Sakai, JP); Takayuki Nishiyama (Sakai, JP); Ryo Yonebayashi (Sakai, JP)
Assignee: SHARP KABUSHIKI KAISHA
G02F1/136286G02F1/1368G02F1/13454G09F9/00G09F9/30G09G3/3648G09G3/3677G09G3/3688G02F2201/123G02F2201/56G09G2300/0426G09G2300/0804G09G2310/0286G09G2310/08G11C19/28
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Quick Facts
Patent No.
US 10,191,344
App. No.
15/528,498
Granted
Jan 29, 2019
Kind
B2
Abstract

Provided is an active matrix substrate that includes gate lines ( 13 G), source lines, pixel switching elements, a plurality of gate line driving circuits ( 11 ) that control potentials of the gate lines, in the display region, and control signal lines ( 15 L 1 ) that supply a control signal to the gate line driving circuits ( 11 ). Each of the gate line driving circuits ( 11 ) includes driving switching elements and a capacitor. At least part of the driving switching elements and the capacitor are arranged at positions closer to, not the gate line ( 13 G) corresponding to the gate line driving circuit ( 11 ), but another gate line ( 13 G).

Claims (29)

1. An active matrix substrate comprising:

a plurality of gate lines that extend in a first direction in a display region;

a plurality of source lines that extend in a second direction in the display region, the second direction being different from the first direction;

pixel switching elements provided for pixels, respectively, in the display region and are connected to the gate lines and the source lines, the pixels being defined by the gate lines and the source lines;

a plurality of gate line driving circuits that are provided in the display region, in correspondence to each of the gate lines to control a potential thereof; and

a control signal line that supplies a control signal from outside the display region to the gate line driving circuits,

wherein each of the gate line driving circuits includes a plurality of driving switching elements for switching ON/OFF according to the control signal, and a capacitor that is connected to at least one of the driving switching elements,

at least part of the driving switching elements and the capacitor are arranged at positions closer to, not the gate line corresponding to the gate line driving circuit that includes the driving switching elements, but another gate line that is other titan the corresponding gate line, and

the another gate line is arranged between the at least part of the driving switching elements and the capacitor, and the gate line corresponding to the gate line driving circuit that includes the driving switching elements.

2. The active matrix substrate according to claim 1 ,

wherein the driving switching elements include a first switching element arranged to control an output to the corresponding gate line,

each of the gate line driving circuits includes a line to control ON/OFF of the first switching element,

the capacitor includes a first capacitor provided between the line and the corresponding gate line, and

at least any of the line, the first capacitor, and the first switching element is arranged at a position closer to the another gate line, than the corresponding gate line.

3. The active matrix substrate according to claim 1 ,

wherein the driving switching elements of each gate line driving circuit are arranged in an array of the pixels that are aligned along the another gate line other than the gate line corresponding to the gate line driving circuit, and

between the array of the pixels along the another gate line, and an array of the pixels along the gate line corresponding to the gate line driving circuit, at least still another one array of the pixels is arranged.

4. The active matrix substrate according to claim 1 ,

wherein the control signal includes a clock signal, and

the clock signal is a multiphase, clock of four or more phases.

5. The active matrix substrate according to claim 1 ,

wherein the control signal line includes a clock signal line, and

the clock signal line includes:

a first clock line that extends in the first direction in the display region, and is connected to at least one of the switching elements of the gate line driving circuit in the display region; and

a second clock line that is connected to the first clock line and extends in the second direction outside the display region.

6. A display panel comprising:

the active matrix substrate according to claim 1 ;

a counter substrate opposed to the active matrix substrate; and

a liquid crystal layer provided between the active matrix substrate and the counter substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2018
From: NOMA, TAKESHI; TANAKA, KOHHEI; NISHIYAMA, TAKAYUKI; YONEBAYASHI, RYO
To: SHARP KABUSHIKI KAISHA
Reel/Frame 047789/0363 →
Priority Claims (1)
JP 2014-236843 · Nov 21, 2014 · national
Continuity (1)
Related Publication 20170261828A1 · Sep 14, 2017
Cited By (3)
US 12,293,699 US 12,530,095 US 12,626,641