IP Library Granted Patent US 10,211,133
Granted Patent B2
US 10,211,133 · App. 15/810,733 · Granted Feb 19, 2019

Package with interconnections having different melting temperatures

Inventors: Andreas Grassmann (Regensburg, DE); Juergen Hoegerl (Regensburg, DE); Angela Kessler (Sinzing, DE); Ivan Nikitin (Regensburg, DE)
Assignee: Infineon Technologies AG
H01L23/49568H01L21/4882H01L23/3735H01L23/49513H01L23/49531H01L23/49575H01L24/29H01L24/30H01L24/32H01L24/73H01L24/83H01L23/4334H01L2224/2912H01L2224/29111H01L2224/29116H01L2224/29139H01L2224/30181H01L2224/30505H01L2224/32245H01L2224/48091H01L2224/48245H01L2224/73215H01L2224/73265H01L2224/8382H01L2224/8384H01L2224/83447H01L2224/83906H01L2924/014
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Quick Facts
Patent No.
US 10,211,133
App. No.
15/810,733
Granted
Feb 19, 2019
Kind
B2
Abstract

A package comprising at least one electronic chip, a first heat removal body on which the at least one electronic chip is mounted by a first interconnection, a second heat removal body mounted on or above the at least one electronic chip by a second interconnection, and an encapsulant encapsulating at least part of the at least one electronic chip, part of the first heat removal body and part of the second heat removal body, wherein the first interconnection is configured to have another melting temperature than the second interconnection.

Claims (8)

1. A method of manufacturing a package, wherein the method comprises:

mounting at least one electronic chip on a first heat removal body by a first interconnection;

mounting at least one spacer body on the at least one electronic chip by a second interconnection;

mounting a second heat removal body on the spacer body by a third interconnection;

wherein one of the first interconnection, the second interconnection, and the third interconnection has a melting temperature different from the other two of the first interconnection, the second interconnection, and the third interconnection;

wherein the second heat removal body is mounted on the at least one spacer body before mounting the at least one spacer body on the at least one electronic chip.

2. The method according to claim 1 , wherein the at least one electronic chip is mounted on the first heat removal body before mounting the at least one spacer body on the at least one electronic chip.

3. The method according to claim 1 , wherein forming the last of the first interconnection, the second interconnection, and the third interconnection is carried out at a low enough interconnection temperature that the other two previously formed interconnections are prevented from melting or re-melting during forming the last interconnection.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2017
From: GRASSMANN, ANDREAS; HOEGERL, JUERGEN; KESSLER, ANGELA; NIKITIN, IVAN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 044111/0030 →
Priority Claims (1)
DE 10 2016 121 801 · Nov 14, 2016 · national
Continuity (1)
Related Publication 20180138111A1 · May 17, 2018
Cited By (4)
US 12,224,222 US 12,348,167 US 12,616,074 US 12,635,589