Electrostatic discharge protection device and electronic device having the same

1. An electrostatic discharge (ESD) protection device comprising:

an N-type laterally diffused metal oxide semiconductor (LDMOS) transistor comprising a source electrode, a gate electrode, and a well bias electrode that are connected to a first pad receiving a first voltage, the N-type LDMOS transistor further comprising a drain electrode connected to a middle node; and

a silicon controlled rectifier (SCR) connected to the N-type LDMOS transistor in series, the SCR comprising a first end connected to the middle node and the drain electrode of the N-type LDMOS transistor, and the SCR further comprising a second end connected to a second pad receiving a second voltage higher than the first voltage,

wherein the SCR comprises:

a first N-type drift region;

an N-type well region disposed in the first N-type drift region;

a first N-type doping region disposed in the N-type well region, the first N-type doping region being connected to the second pad; and

a first P-type doping region disposed in the first N-type drift region, the first P-type doping region being connected to the second pad.

2. The ESD protection device of claim 1 , wherein the SCR comprises an N-type floating diffusion region disposed in the first N-type drift region, the N-type floating diffusion region being electrically floating.

3. The ESD protection device of claim 2 , wherein a first impurity concentration of the N-type floating diffusion region is higher than a second impurity concentration of the first N-type drift region.

4. The ESD protection device of claim 1 , wherein the N-type LDMOS transistor comprises:

a P-type well region;

a second N-type doping region disposed in the P-type well region, the second N-type doping region being connected to the source electrode;

a second P-type doping region disposed in the P-type well region, the second P-type doping region being connected to the well bias electrode;

a second N-type drift region;

a third N-type doping region disposed in the second N-type drift region, the third N-type doping region being connected to the drain electrode; and

a gate disposed above a first portion of the P-type well region and a second portion of the second N-type drift region, the gate being connected to the gate electrode.

5. The ESD protection device of claim 1 , further comprising a shunting diode comprising an anode electrode connected to the first pad, and a cathode electrode connected to the second pad.

6. An electrostatic discharge (ESD) protection device comprising:

an N-type laterally diffused metal oxide semiconductor (LDMOS) transistor comprising a source electrode, a gate electrode, and a well bias electrode that are connected to a first pad receiving a first voltage, and a drain electrode connected to a middle node; and

a silicon controlled rectifier (SCR) connected between the middle node and a second pad receiving a second voltage higher than the first voltage,

wherein the SCR comprises:

an N-type drift region;

a P-type body region contacting the N-type drift region;

a first N-type well region disposed in the N-type drift region;

an N-type floating diffusion region disposed in the N-type drift region, the N-type floating diffusion region being spaced apart from the first N-type well region and being electrically floating;

a first N-type doping region disposed in the first N-type well region, the first N-type doping region being connected to the second pad;

a first P-type doping region disposed in the N-type drift region between the first N-type well region and the N-type floating diffusion region, the first P-type doping region being connected to the second pad;

a second N-type doping region disposed in the P-type body region, the second N-type doping region being connected to the middle node; and

a second P-type doping region disposed in the P-type body region, the second P-type doping region being connected to the middle node.

7. The ESD protection device of claim 6 , wherein the N-type floating diffusion region is spaced apart from the first N-type well region in a direction of the P-type body region.

8. The ESD protection device of claim 6 , wherein the second N-type doping region contacts the second P-type doping region.

9. The ESD protection device of claim 6 , wherein the SCR further comprises a first gate disposed above the N-type drift region and the P-type body region and between the N-type floating diffusion region and the second N-type doping region, the first gate being connected to the middle node.

10. The ESD protection device of claim 9 , wherein the second N-type doping region surrounds the second P-type doping region in a track pattern.

11. The ESD protection device of claim 10 , wherein the first gate surrounds the second N-type doping region in a first track pattern.

12. The ESD protection device of claim 11 , wherein the N-type floating diffusion region surrounds the first gate in a second track pattern.

13. The ESD protection device of claim 9 , wherein the SCR further comprises:

a diode comprising a cathode electrode connected to the second pad, and an anode electrode connected to the first gate; and

a resistor connected between the first gate and the middle node,

wherein the diode comprises a P-type LDMOS transistor comprising:

a second gate connected to the cathode electrode;

a second N-type well region;

a third N-type doping region disposed in the second N-type well region, the third N-type doping region being connected to the cathode electrode;

a P-type drift region; and

a third P-type doping region disposed in the P-type drift region, the third P-type doping region being connected to the anode electrode.

14. The ESD protection device of claim 13 , wherein the third P-type doping region corresponds to a drain region of the P-type LDMOS transistor, and

the third N-type doping region corresponds to a well bias region of the P-type LDMOS transistor.