IP Library › Granted Patent US 10,218,492
Granted Patent B2
US 10,218,492 · App. 15/470,479 · Granted Feb 26, 2019

Clock and data recovery for pulse based multi-wire link

Inventor: Shoichiro Sengoku (San Diego, CA)
Assignee: QUALCOMM Incorporated
H04L7/0045G06F1/12H03K5/13H03K5/133H03K5/1534H04L7/0037H04L7/0087H04L7/033H04L25/49
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Quick Facts
Patent No.
US 10,218,492
App. No.
15/470,479
Granted
Feb 26, 2019
Kind
B2
Abstract

A method and an apparatus are provided. The apparatus may include a clock recovery circuit having a plurality of input latches configured to assume a first state when a first pulse is received in one or more of a plurality of input signals, combinational logic configured to provide a second pulse response to the first pulse, a delay circuit configured to produce a third pulse on a receive clock that is delayed with respect to the second pulse, a plurality of output flip-flops configured to capture the first state when triggered by the third pulse. The first state may identify which of the plurality of input signals received input pulses.

Claims (20)

1. A method, comprising:

transcoding a data word into a multi-digit number, wherein transcoding the data word into the multi-digit number includes embedding clock information in the multi-digit number; and

transmitting a combination of pulses over a plurality of connectors of a multi-wire communication link in each transmission interval in a sequence of transmission intervals, wherein each digit of the multi-digit number defines the combination of pulses for a corresponding transmission interval in the sequence of transmission intervals,

wherein a pulse is transmitted on at least one of the plurality of connectors during each transmission interval in the sequence of transmission intervals, and

wherein the plurality of connectors comprises N connectors and the multi-digit number is expressed as a base (2 N −1) number.

2. The method of claim 1 , wherein the plurality of connectors includes two connectors and the multi-digit number is expressed as a ternary number, or the plurality of connectors includes three connectors and the multi-digit number is expressed as a septenary number.

3. The method of claim 1 , further comprising:

encoding information in one or more non-return-to-zero signals; and

transmitting the one or more non-return-to-zero signals over one or more other connectors of the multi-wire communication link.

4. The method of claim 1 , wherein the combinations of pulses are provided to the plurality of connectors through a capacitive, inductive, or optical coupling.

5. A communication interface, comprising:

a transcoder configured to produce a multi-digit number from a data word, wherein the multi-digit number includes embedded clock information; and

circuitry configured to provide a combination of pulses for transmission over a plurality of connectors during one transmission interval in a sequence of transmission intervals, wherein the combination of pulses is defined by a digit of the multi-digit number,

wherein a pulse is transmitted on at least one of the plurality of connectors during each transmission interval in the sequence of transmission intervals, and

wherein the plurality of connectors comprises N connectors and the multi-digit number is expressed as a base (2 N −1) number.

6. The communication interface of claim 5 , wherein the plurality of connectors includes two connectors and the multi-digit number is expressed as a ternary number, or the plurality of connectors includes three connectors and the multi-digit number is expressed as a septenary number.

7. The communication interface of claim 5 , further comprising a transmitter circuit configured to:

encode information in one or more non-return-to-zero signals; and

transmit the one or more non-return-to-zero signals over one or more other connectors of the communication interface.

8. The communication interface of claim 5 , further comprising a transmitter configured to capacitively couple, inductively couple, or optically couple the circuitry to the plurality of connectors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2017
From: SENGOKU, SHOICHIRO
To: QUALCOMM INCORPORATED
Reel/Frame 041760/0208 →
Continuity (3)
Division 15084171 · Mar 29, 2016
Provisional Application 62146801 · Apr 13, 2015
Related Publication 20170201370A1 · Jul 13, 2017
Cited By (2)
US 12,218,770 US 12,339,721