Initializing a system on a chip
In one example, a system on a chip can include an embedded controller and a security controller that can detect, during an initialization process, a request for embedded controller firmware stored in block storage from the embedded controller via a transmission link. The security controller can also retrieve the embedded controller firmware stored in the block storage and transmit the embedded controller firmware to the embedded controller via the transmission link.
1. A system on a chip for loading firmware comprising:
a security controller to:
detect, during an initialization process, a request for embedded controller firmware stored in block storage from an embedded controller via a transmission link;
read a partition table from the block storage and search for a firmware identifier to locate the embedded controller firmware, wherein the block storage comprises an operating system and the embedded controller firmware;
retrieve the embedded controller firmware stored in the block storage based on the firmware identifier; and
transmit the embedded controller firmware to the embedded controller via the transmission link, wherein the transmission link is to use a ring buffer to store data blocks corresponding to the operating system and the embedded controller firmware.
2. The system of claim 1 , wherein the security controller is to detect that a basic input/output system (BIOS) or an operating system is initiated and retrieve the embedded controller firmware stored in the block storage via a driver stored in the security controller, the driver to access the block storage via at least one processor core during runtime.
3. The system of claim 1 , wherein the initialization process is a boot process for the system on a chip.
4. The system of claim 1 , wherein the security controller is to access the block storage using a non-volatile memory express (NVME) protocol.
5. The system of claim 1 , wherein the security controller is to access the block storage using a universal flash storage (UFS) protocol.
6. The system of claim 1 , wherein the request comprises a start address corresponding to a beginning memory address of the embedded controller firmware and a size of the embedded controller firmware.
7. The system of claim 1 , wherein the transmission link is an eSPI transmission link.
8. A method for loading firmware comprising:
detecting a request for embedded controller firmware stored in block storage from an embedded controller via a transmission link;
reading a partition table from the block storage and searching for a firmware identifier to locate the embedded controller firmware, wherein the block storage comprises an operating system and the embedded controller firmware;
retrieving the embedded controller firmware stored in the block storage based on the firmware identifier, wherein a security controller is to detect that the operating system is initiated and retrieve the embedded controller firmware stored in the block storage via a driver stored in the security controller, the driver to access the block storage via at least one processor core during runtime; and
transmitting the embedded controller firmware to the embedded controller via the transmission link, wherein the transmission link is to use a ring buffer to store data blocks corresponding to the operating system and the embedded controller firmware.
9. The method of claim 8 , comprising accessing the block storage using a peripheral component interconnect (PCI) protocol.
10. The method of claim 8 , comprising accessing the block storage using a non-volatile memory express (NVME) protocol.
11. The method of claim 8 , comprising accessing the block storage using a universal flash storage (UFS) protocol.
12. The method of claim 8 , wherein the request comprises a start address corresponding to a beginning memory address of the embedded controller firmware and a size of the embedded controller firmware.
13. A system for loading firmware comprising:
an embedded controller to:
execute internal firmware stored in read only memory residing on the embedded controller;
transmit an indicator to a power controller to initialize power for a system on a chip, the system on a chip comprising a security controller, an enhanced serial peripheral interface (eSPI) controller, and a block media controller;
transmit, via an enhanced serial peripheral interface transmission link, a read firmware command to the security controller, wherein the embedded controller is to transmit the read firmware command during a runtime environment, the runtime environment comprising an initiated operating system; and
retrieve, via the enhanced serial peripheral interface transmission link, external firmware corresponding to the read firmware command, the external firmware to be retrieved from the block storage via the security controller, wherein the block storage comprises data blocks corresponding to the initiated operating system and the external firmware, wherein the serial peripheral interface transmission link is to use a ring buffer to store the data blocks corresponding to the initiated operating system and the external firmware.
14. The system of claim 13 , wherein the read firmware command comprises a controller identifier, a base address, and a length of command.
15. The system of claim 13 , wherein the internal firmware comprises master attached flashing model firmware.
16. The system of claim 13 , wherein the read firmware command comprises a request for embedded controller firmware.
17. The system of claim 13 , wherein the embedded controller is to transmit the read firmware command to the security controller via a security controller interface.