IP Library Granted Patent US 10,228,595
Granted Patent B2
US 10,228,595 · App. 15/520,265 · Granted Mar 12, 2019

Display device with layered wiring structure for external connection

Inventors: Etsuo Yamamoto (Sakai, JP); Hiroyuki Ohkawa (Sakai, JP); Shige Furuta (Sakai, JP)
Assignee: SHARP KABUSHIKI KAISHA
G02F1/136286G02F1/1345G09G3/3614G09G3/3688G02F2001/13629G09G3/006G09G2300/0426G09G2310/0202G09G2330/12
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Quick Facts
Patent No.
US 10,228,595
App. No.
15/520,265
Granted
Mar 12, 2019
Kind
B2
Abstract

In a display device having a layered wiring structure of P layers, and employing a Q-column reversal driving method in which a polarity of a video signal is reversed every Q source bus lines, the plurality of source bus lines are wired to the plurality of layers such that taking source bus lines of a number equal to a double of a least common multiple of P and Q as one group, the number of source bus lines to which positive video signals are applied matches the number of source bus lines to which negative video signals are applied in each of the layers in each of horizontal scanning periods.

Claims (39)

1. A display device comprising:

a panel substrate including a layered region and a display region, the layered region having a layered wiring structure of a plurality of layers;

a plurality of video signal lines provided on the panel substrate; and

a plurality of external connecting terminals, provided on the panel substrate, for receiving supply of video signals to be applied to the plurality of video signal lines, wherein

the plurality of video signal lines are provided so as to extend from the plurality of external connecting terminals into the display region via the layered region, and

the plurality of video signal lines are wired in the plurality of layers such that a number of video signal lines to which positive video signals are applied is substantially equal to a number of video signal lines to which negative video signals are applied in each of the layers in the layered region in each of horizontal scanning periods.

2. The display device according to claim 1 , wherein

the panel substrate includes, as the layered region, a first layered region and a second layered region between the plurality of external connecting terminals and the display region, and

each of the plurality of video signal lines is wired in different layers in the first layered region and the second layered region.

3. The display device according to claim 1 , wherein

the plurality of video signal lines and a different line intersect in a region in which the plurality of video signal lines are wired in the same layer.

4. The display device according to claim 1 , wherein

in the layered region, wiring widths of the plurality of video signal lines are different between the layers.

5. The display device according to claim 1 , wherein

the layered region has a layered wiring structure of P layers (where P is an integer equal to or greater than 2),

a Q-column reversal driving method in which a polarity of a video signal is reversed every Q video signal lines is employed (where Q is a natural number), and

taking video signal lines of a number equal to a double of a least common multiple of P and Q as one group, the number of video signal lines to which the positive video signals are applied matches the number of video signal lines to which the negative video signals are applied in each of the layers in the layered region in each of horizontal scanning periods.

6. The display device according to claim 5 , further comprising:

a potential supply line configured to be able to supply a predetermined potential to each of the video signal lines.

7. The display device according to claim 6 , wherein

in the layered region, two video signal lines adjacent in a vertical direction are a combination of a video signal line of an odd-numbered column and a video signal line of an even-numbered column, and two video signal lines adjacent in a horizontal direction are a combination of a video signal line of an odd-numbered column and a video signal line of an even-numbered column.

8. The display device according to claim 7 , wherein

the potential supply line includes a first-type potential supply line connected to the video signal line of the odd-numbered column and a second-type potential supply line connected to the video signal line of the even-numbered column.

9. The display device according to claim 8 , wherein

the potential supply line includes a single first-type potential supply line and a single second-type potential supply line.

10. The display device according to claim 8 , wherein

potentials of different values are respectively supplied to the first-type potential supply line and the second-type potential supply line.

11. The display device according to claim 7 , wherein

the layered region has a layered wiring structure of two layers.

12. The display device according to claim 6 , wherein

a predetermined reference potential is supplied to the plurality of video signal lines via the potential supply line.

13. The display device according to claim 1 , wherein

the layered region has a layered wiring structure of two layers including a first layer and a second layer,

the plurality of the video signal lines are arranged in columns,

where n is a natural number, the video signal lines of (4n−3)th columns and the video signal lines of 4n-th columns of the plurality of video signal lines are wired in the first layer, and the video signal lines of (4n−2)th columns and the video signal lines of (4n−1)th columns of the plurality of video signal lines are wired in the second layer.

14. The display device according to claim 13 , wherein

the panel substrate includes, as the layered region, a first layered region and a second layered region between the plurality of external connecting terminals and the display region,

the plurality of video signal lines that are wired in the first layer in the first layered region are wired in the second layer in the second layered region, and

the plurality of video signal lines that are wired in the second layer in the first layered region are wired in the first layer in the second layered region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2017
From: YAMAMOTO, ETSUO; OHKAWA, HIROYUKI; FURUTA, SHIGE
To: SHARP KABUSHIKI KAISHA
Reel/Frame 042063/0970 →
Priority Claims (1)
JP 2014-236424 · Nov 21, 2014 · national
Continuity (1)
Related Publication 20170336688A1 · Nov 23, 2017
Cited By (2)
US 12,236,809 US 12,542,077