IP Library › Granted Patent US 10,229,468
Granted Patent B2
US 10,229,468 · App. 14/729,915 · Granted Mar 12, 2019

Automated conversion of GPGPU workloads to 3D pipeline workloads

Inventors: Robert B. Taylor (Hillsboro, OR); Abhishek Venkatesh (Hillsboro, OR)
Assignee: Intel Corporation
G06T1/20G06F9/48
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Quick Facts
Patent No.
US 10,229,468
App. No.
14/729,915
Granted
Mar 12, 2019
Kind
B2
Abstract

Systems, apparatuses and methods may provide for receiving a general purpose graphics processing unit (GPGPU) workload and converting the GPGPU workload to a three-dimensional (3D) workload. Additionally, the 3D workload may be dispatched to a 3D pipeline. In one example, converting the GPGPU workload to the 3D workload includes identifying a plurality of thread groups in the GPGPU workload and mapping the plurality of thread groups to a 3D matrix of cubes.

Claims (56)

1. A computing device comprising:

a host processor including a workload converter to convert a general purpose graphics processing unit (GPGPU) workload to a three-dimensional (3D) workload by:

an identification of a plurality of thread groups in the GPGPU workload; and

an association of the plurality of thread groups to a 3D matrix of cubes;

a graphics processor including:

a command streamer to dispatch the 3D workload; and

a 3D pipeline separate from the workload converter and including 3D-specific fixed function units, the 3D pipeline to receive the 3D workload from the command streamer and process the 3D workload with the 3D-specific fixed function units;

a display interface to receive data associated with an execution of the 3D workload; and

a display device to generate a display output based on the data in the display interface.

2. The computing device of claim 1 , wherein each cube is to include an array of two-dimensional (2D) primitives.

3. The computing device of claim 2 , wherein each primitive is to be a quad.

4. The computing device of claim 2 , wherein the 3D pipeline includes:

a pixel shader interface; and

a vertex shader to identify, for each of the 2D primitives associated with the 3D workload, a plurality of vertices and generate system values for the plurality of vertices, wherein the system values are to have a one-to-one relationship with the pixel shader interface.

5. The computing device of claim 1 , wherein the command streamer is to call a plurality of non-GPGPU shader threads to dispatch the 3D workload.

6. The computing device of claim 1 , wherein the 3D-specific fixed function units are not available to compute kernels.

7. A computing architecture comprising:

a workload converter to receive a general purpose graphics processing unit (GPGPU) workload and convert the GPGPU workload to a three-dimensional (3D) workload by:

an identification of a plurality of thread groups in the GPGPU workload; and

an association of the plurality of thread groups to a 3D matrix of cubes;

a command streamer to dispatch the 3D workload; and

a 3D pipeline separate from the workload converter and including 3D-specific fixed function units, the 3D pipeline to receive the 3D workload from the command streamer and process the 3D workload with the 3D-specific fixed function units.

8. The computing architecture of claim 7 , wherein each cube is to include an array of two-dimensional (2D) primitives.

9. The computing architecture of claim 8 , wherein each primitive is to be a quad.

10. The computing architecture of claim 8 , wherein the 3D pipeline includes:

a pixel shader interface; and

a vertex shader to identify, for each of the 2D primitives associated with the 3D workload, a plurality of vertices and generate system values for the plurality of vertices, wherein the system values are to have a one-to-one relationship with the pixel shader interface.

11. The computing architecture of claim 7 , wherein the command streamer is to call a plurality of non-GPGPU shader threads to dispatch the 3D workload.

12. The computing architecture of claim 7 , wherein the 3D-specific fixed function units are not available to compute kernels.

13. A method comprising:

receiving a general purpose graphics processing unit (GPGPU) workload;

converting, with a workload converter, the GPGPU workload to a three-dimensional (3D) workload by:

identifying a plurality of thread groups in the GPGPU workload; and

associating the plurality of thread groups to a 3D matrix of cubes;

dispatching the 3D workload, that is converted from the GPGPU workload, to a 3D pipeline separate from the workload converter; and

processing the 3D workload with 3D-specific fixed function units of the 3D pipeline.

14. The method of claim 13 , wherein each cube includes an array of two-dimensional (2D) primitives.

15. The method of claim 14 , wherein each 2D primitive is a quad.

16. The method of claim 14 , further including:

identifying, for each of the 2D primitives associated with the 3D workload, a plurality of vertices; and

generating system values for the plurality of vertices, wherein the system values have a one-to-one relationship with a pixel shader interface associated with the 3D pipeline.

17. The method of claim 13 , wherein dispatching the 3D workload to the 3D pipeline includes calling a plurality of non-GPGPU shader threads.

18. The method of claim 13 , wherein the 3D-specific fixed function units are not available to compute kernels.

19. At least one non-transitory computer readable storage medium comprising a set of instructions, which when executed by a computing device, cause the computing device to:

receive a general purpose graphics processing unit (GPGPU) workload;

convert, with a workload converter, the GPGPU workload to a three-dimensional (3D) workload to be processed by 3D-specific fixed function units by:

an identification of a plurality of thread groups in the GPGPU workload; and

an association of the plurality of thread groups to a 3D matrix of cubes; and

dispatch the 3D workload, that is converted from the GPGPU workload, to a 3D pipeline, that includes the 3D-specific fixed function units and that is separate from the workload converter, so that the 3D workload is to be processed by the 3D-specific fixed function units.

20. The at least one non-transitory computer readable storage medium of claim 19 , wherein each cube is to include an array of two-dimensional (2D) primitives.

21. The at least one non-transitory computer readable storage medium of claim 20 , wherein each 2D primitive is to be a quad.

22. The at least one non-transitory computer readable storage medium of claim 20 , wherein the instructions, when executed, cause the computing device to:

identify, for each of a plurality of the 2D primitives associated with the 3D workload, a plurality of vertices; and

generate system values for the plurality of vertices, wherein the system values are to have a one-to-one relationship with a pixel shader interface associated with the 3D pipeline.

23. The at least one non-transitory computer readable storage medium of claim 19 , wherein the instructions, when executed, cause the computing device to call a plurality of non-GPGPU shader threads to dispatch the 3D workload.

24. The at least one non-transitory computer readable storage medium of claim 19 , wherein the 3D-specific fixed function units are not available to compute kernels.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2015
From: TAYLOR, ROBERT B.; VENKATESH, ABHISHEK
To: INTEL CORPORATION
Reel/Frame 035780/0067 →
Continuity (1)
Related Publication 20160358300A1 · Dec 8, 2016