Display device

1. A display device, comprising:

a first pixel region having a first scan line and a second pixel region having a second scan line;

first pixels connected to the first scan line in the first pixel region, each first pixel including a first transistor; and

second pixels connected to the second scan line in the second pixel region, each second pixel including a second transistor performing a same function as the first transistor,

wherein a number of first pixels is greater than a number of second pixels, and

wherein at least one of a channel width (W) and a channel length (L) of the first and second transistors is different from one another.

2. The display device as claimed in claim 1 , wherein the first pixel region has a larger width than the second pixel region.

3. The display device as claimed in claim 2 , wherein

the first transistor and the second transistor are driving transistors, and

a W/L of the first transistor is smaller than a W/L of the second transistor.

4. The display device as claimed in claim 2 , wherein

the first transistor and the second transistor are control transistors for diode-connecting driving transistors, and

a mounting area of the first transistor larger than a mounting area of the second transistor.

5. The display device as claimed in claim 2 , further comprising:

a third pixel region having a third scan line; and

third pixels connected to the third scan line in the third pixel region, each third pixel including a third transistor performing the same function as the first transistor,

wherein a number of third pixels is less than the number of second pixels.

6. The display device as claimed in claim 5 , wherein the third pixel region has a smaller width than the second pixel region.

7. The display device as claimed in claim 6 , wherein

the first transistor, the second transistor, and the third transistor are driving transistors,

a W/L of the first transistor is smaller than a W/L of the second transistor, and

a W/L of the third transistor is larger than the W/L of the second transistor.

8. The display device as claimed in claim 6 , wherein

the first transistor, the second transistor, and the third transistor are control transistors for diode-connecting driving transistors,

a mounting area of the first transistor is larger than a mounting area of the second transistor, and

a mounting area of the third transistor is smaller than the mounting area of the second transistor.

9. The display device as claimed in claim 2 , further comprising:

a third pixel region having the same width as the second pixel region; and

third pixels in the third pixel region, each including a third transistor performing the same function as the first transistor.

10. The display device as claimed in claim 9 , wherein a W/L of the third transistor is equal to be a W/L of the second transistor.

11. The display device as claimed in claim 10 , wherein the second transistor and the third transistor are driving transistors.

12. The display device as claimed in claim 10 , wherein the second transistor and the third transistor are control transistors for diode-connecting driving transistors.

13. The display device as claimed in claim 2 , wherein a width of the second pixel region gradually decreases from a first width to a second width, smaller than the first width.

14. The display device as claimed in claim 13 , wherein the second pixel region is divided into j, where j is a natural number of no less than 2, regions including at least one horizontal line.

15. The display device as claimed in claim 14 , wherein

each of the j regions includes no less than two horizontal lines, and

W/Ls of the second transistors in a same region of the j regions are the same.

16. The display device as claimed in claim 14 , wherein

the second transistor is a driving transistor, and

W/Ls of the second transistors differ between the j regions.

17. The display device as claimed in claim 16 , wherein a W/L of the second transistor larger in a region having a smaller width.

18. The display device as claimed in claim 14 , wherein

the second transistor is a control transistor for diode-connecting driving transistors, and

mounting areas of the second transistors differ between the j regions.

19. The display device as claimed in claim 18 , wherein a mounting area of the second transistor is smaller in a region having a smaller width.

20. A display device, comprising:

a first pixel region having a first scan line and a second pixel region having a second scan line;

first pixels connected to the first scan line in the first pixel region, each first pixel including a first capacitor; and

second pixels connected to the second scan line in the second pixel region, each second pixel including a second capacitor performing a same function as the first capacitor,

wherein a number of first pixels is greater than a number of second pixels, and

wherein capacitances of the first capacitor and the second capacitor differ.

21. The display device as claimed in claim 20 , wherein the first pixel region has a larger width than the second pixel region.

22. The display device as claimed in claim 20 , wherein

the first capacitor and the second capacitor are storage capacitors to store voltages of data signals, and

the first capacitor has a lower capacity than the second capacitor.

23. The display device as claimed in claim 20 , wherein

the first capacitor and the second capacitor are boosting capacitors between a scan line and a driving transistor, and

the first capacitor has a higher capacity than the second capacitor.

24. A display device, comprising:

first pixels connected to a first scan line in a first pixel region having a first width; and

second pixels connected to a second scan line in a second pixel region having a second width different from the first width,

wherein a number of first pixels is greater than a number of second pixels, and

wherein each of the first pixels and the second pixels includes:

an organic light emitting diode (OLED);

a first transistor to control an amount of current that flows from a first power source connected to a first electrode to a second power source via the OLED; and

a second transistor connected between a data line and the first electrode of the first transistor,

wherein at least one of a channel width (W) and a channel length (L) of at least one of the first transistor and the second transistor in the first and second pixels is different from one another.

25. The display device as claimed in claim 24 , wherein the first width has a larger width than the second width.

26. The display device as claimed in claim 25 , wherein a W/L of the first or second transistor in the first pixel is set to be smaller than a W/L of the first or second transistor in the second pixel.

27. The display device as claimed in claim 25 , wherein each of the first pixels and the second pixels further includes a third transistor connected between a gate electrode of the first transistor and a second electrode of the first transistor.

28. The display device as claimed in claim 27 , wherein a mounting area of the third transistor in the first pixel is larger than a mounting area of the third transistor included in the second pixel.

29. The display device as claimed in claim 27 , wherein each of the first pixels and the second pixels further includes a boosting capacitor connected between a scan line and the gate electrode of the first transistor.

30. The display device as claimed in claim 29 , wherein the boosting capacitor in the first pixel has a higher capacity than the boosting capacitor in the second pixel.

31. The display device as claimed in claim 27 , wherein each of the first pixels and the second pixels further include a storage capacitor connected between the gate electrode of the first transistor and the first power source.

32. The display device as claimed in claim 31 , wherein the storage capacitor in the first pixel has lower capacity than the storage capacitor in the second pixel.