IP Library Granted Patent US 10,242,976
Granted Patent B2
US 10,242,976 · App. 15/396,467 · Granted Mar 26, 2019

In-package photonics integration and assembly architecture

Inventor: Myung Jin Yim (San Jose, CA)
Assignee: INTEL CORPORATION
H01L25/50H01L25/0652G02B6/4274H01L2225/06513H01L2225/06517H01L2225/06589
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Quick Facts
Patent No.
US 10,242,976
App. No.
15/396,467
Granted
Mar 26, 2019
Kind
B2
Abstract

In one embodiment, a microelectronic package structure comprises a substrate comprising at least one waveguide, a first instrument integrated circuit coupled to the substrate, a photonic engine coupled to the substrate and comprising an integrated circuit body, a transmit die. and a receive die. The photonic engine is positioned adjacent the at least one waveguide such that optical signals may be exchanged between the at least one waveguide and the transmit die and the at least one waveguide and the receive die. Other embodiments may be described.

Claims (28)

1. A microelectronic package structure, comprising:

a substrate comprising at least one waveguide comprising at least one surface which is disposed in a first plane;

a first integrated circuit coupled to the substrate;

a photonic engine coupled to the substrate and comprising:

an integrated circuit body;

a transmit die coupled to the integrated circuit body by a plurality of bumps having a first height; and

a receive die coupled to the integrated circuit body by a plurality of bumps having the first height;

an optical coupling coupled to the at least one waveguide;

wherein the integrated circuit body is coupled to the substrate by a second plurality of bumps having a second height, greater than the first height, and

wherein the photonic engine comprises at least one surface which is positioned in a plane parallel to the first plane and adjacent the at least one waveguide such that optical signals may be exchanged between the at least one waveguide and the transmit die and the at least one waveguide and the receive die.

2. The microelectronic package structure of claim 1 , wherein:

the photonic engine is coupled to the substrate via one or more solder balls; and

the one or more solder balls are at least partially covered by a mold material,

wherein the mold material defines an air gap between the transmit die and the at least one waveguide and the receive die and the at least one waveguide.

3. The microelectronic package structure of claim 2 , further comprising:

an optical coupling coupled to the at least one waveguide.

4. The microelectronic package structure of claim 2 , further comprising:

a thermal interface material (TIM) in thermal communication with the photonic engine.

5. The microelectronic package structure of claim 4 , further comprising:

a heat spreader in thermal communication with the thermal interface material.

6. The microelectronic package structure of claim 4 , further comprising:

a ball grid array positioned proximate a surface of the substrate.

7. The microelectronic package structure of claim 1 , further comprising:

a memory device coupled to the substrate.

8. The microelectronic package structure of claim 7 , further comprising:

a thermal interface material (TIM) in thermal communication with the memory device.

9. The microelectronic package structure of claim 8 , further comprising:

a heat spreader in thermal communication with the thermal interface material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2017
From: YIM, MYUNG JIN
To: INTEL CORPORATION
Reel/Frame 040843/0949 →
Continuity (1)
Related Publication 20180188448A1 · Jul 5, 2018