IP Library Granted Patent US 10,256,303
Granted Patent B2
US 10,256,303 · App. 15/335,444 · Granted Apr 9, 2019

Semiconductor device

Inventor: Tatsuya Naito (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/0696H01L27/0664H01L29/1095H01L29/404H01L29/407H01L29/4236H01L29/4238H01L29/42364H01L29/7397
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Quick Facts
Patent No.
US 10,256,303
App. No.
15/335,444
Granted
Apr 9, 2019
Kind
B2
Abstract

Provided is a semiconductor device including a plurality of dummy trench portions that are provided in a front surface side of a semiconductor substrate and each have provided therein an electrode to which an emitter potential is supplied, and a gate trench portion that is provided in a manner to surround two or more dummy trench portions from among the plurality of dummy trench portions in the front surface side of the semiconductor substrate and has provided therein an electrode to which a gate potential is supplied.

Claims (46)

1. A semiconductor device comprising:

a plurality of dummy trench portions that are provided in a front surface side of a semiconductor substrate and each have provided therein an electrode to which an emitter potential is supplied; and

a gate trench portion that extends in a first direction and is provided in a manner to be sandwiched at least in the first direction by two or more dummy trench portions from among the plurality of dummy trench portions in the front surface side of the semiconductor substrate and has provided therein an electrode to which a gate potential is supplied.

2. The semiconductor device according to claim 1 , further comprising:

an emitter electrode that is provided such that at least a portion of the gate trench portion is arranged in a region directly below the emitter electrode, and has the emitter potential supplied thereto; and

a gate runner that has at least a portion thereof provided below the emitter electrode and is electrically connected to the electrode provided within the gate trench portion, wherein

the gate runner extends in a direction toward an outer circumference from the region directly below the emitter electrode.

3. The semiconductor device according to claim 2 , wherein

the gate trench portion and the dummy trench portions are provided in an alternating manner in an extension direction of the gate runner.

4. The semiconductor device according to claim 2 , wherein

the gate trench portion includes a linear gate portion that extends in an extension direction of the gate runner, and

each of the dummy trench portions includes a linear dummy portion that extends in a direction orthogonal to the extension direction of the gate runner.

5. The semiconductor device according to claim 2 , wherein

the gate trench portion includes a first linear gate portion that extends in an extension direction of the gate runner and a second linear gate portion that extends in a direction orthogonal to the extension direction of the gate runner, and

each of the dummy trench portions includes a first linear dummy portion that extends in an extension direction of the gate runner and a second linear dummy portion that extends in a direction orthogonal to the extension direction of the gate runner.

6. The semiconductor device according to claim 4 , further comprising:

contact portions for electrically connecting the electrodes provided in the dummy trench portions to the emitter electrode, wherein

the contact portions are provided at positions on top of the dummy trench portions that are not on top of the gate runner.

7. The semiconductor device according to claim 1 , wherein

the gate trench portion and the dummy trench portions have a region where a closest distance therebetween is greater than or equal to a thickness of a trench insulating film and less than or equal to a width of the gate trench portion in a short direction.

8. The semiconductor device according to claim 1 , wherein

the gate trench portion is provided with a ring shape relative to the front surface of the semiconductor substrate.

9. The semiconductor device according to claim 3 , wherein

the gate trench portion and the dummy trench portions are provided in an alternating manner in a direction orthogonal to an extension direction of the gate runner.

10. The semiconductor device according to claim 8 , further comprising:

an impurity injection region that has a ring shape relative to the front surface of the semiconductor substrate and is provided in a manner to surround the ring-shaped gate trench portion, wherein

a plurality of the impurity injection regions that each have a ring shape and are adjacent in a direction orthogonal to an extension direction of a gate runner to which the electrode provided in the gate trench portion is electrically connected are provided in a manner to be shifted by a half pitch in the extension direction of the gate runner.

11. The semiconductor device according to claim 2 , wherein

the gate runner extends above the at least a portion of the gate trench portion.

12. The semiconductor device according to claim 1 , wherein

the gate trench portion is provided in a manner to be further sandwiched in a second direction that is orthogonal to the first direction by two or more dummy trench portions from among the plurality of dummy trench portions.

13. The semiconductor device according to claim 1 , wherein

each gate trench portion and the two or more dummy trench portions are arranged periodically in the first direction and a second direction that is orthogonal to the first direction.

14. The semiconductor device according to claim 1 , wherein

the two or more dummy trench portions are cross-shaped dummy trench portions.

15. A semiconductor device comprising:

at least one dummy trench portion that is provided in a front surface side of a semiconductor substrate and each have provided therein an electrode to which an emitter potential is supplied; and

a gate trench portion that is provided in a manner to be surrounded by a continuous dummy trench portion from among the at least one dummy trench portion in the front surface side of the semiconductor substrate and has provided therein an electrode to which a gate potential is supplied.

16. The semiconductor device according to claim 15 , further comprising:

an emitter electrode that is provided such that at least a portion of the gate trench portion is arranged in a region directly below the emitter electrode, and has the emitter potential supplied thereto; and

a gate runner that has at least a portion thereof provided below the emitter electrode and is electrically connected to the electrode provided within the gate trench portion, wherein

the gate runner extends in a direction toward an outer circumference from the region directly below the emitter electrode.

17. The semiconductor device according to claim 16 , wherein

the gate runner extends above the at least a portion of the gate trench portion.

18. The semiconductor device according to claim 15 , wherein

each gate trench portion is arranged periodically in a first direction and a second direction that is orthogonal to the first direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2016
From: NAITO, TATSUYA
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 040168/0736 →
Priority Claims (1)
JP 2015-243077 · Dec 14, 2015 · national
Continuity (1)
Related Publication 20170170273A1 · Jun 15, 2017