IP Library › Granted Patent US 10,256,603
Granted Patent B2
US 10,256,603 · App. 15/804,716 · Granted Apr 9, 2019

Electro-optical device with III-V gain materials and integrated heat sink

Inventors: Charles Caër (Adliswil, CH); Herwig Hahn (Adliswil, CH)
Assignee: International Business Machines Corporation
H01S5/02476H01S3/2375H01S5/021H01S5/02461H01S5/02484H01S5/0424H01S5/125H01S5/343H01S2304/04
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Quick Facts
Patent No.
US 10,256,603
App. No.
15/804,716
Granted
Apr 9, 2019
Kind
B2
Abstract

An electro-optical device having two wafer components and a device fabrication method. A first wafer component includes a silicon substrate and a cladding layer on top thereof. The cladding layer comprises a cavity formed therein, wherein the cavity is filled with an electrically insulating thermal spreader, which has a thermal conductivity larger than that of the cladding layer. The second wafer component comprises a stack of III-V semiconductor gain materials, designed for optical amplification of a given radiation. The second wafer component is bonded to the first wafer component, such that the stack of III-V semiconductor gain materials is in thermal communication with the thermal spreader. In addition, the thermal spreader has a refractive index that is lower than each of the refractive index of the silicon substrate and an average refractive index of the stack of III-V semiconductor gain materials for said given radiation.

Claims (25)

1. A method of fabricating an electro-optical device, the method comprising:

providing two components of the electro-optical device, wherein:

a first one of the components comprises a silicon substrate and a cladding layer on top of the silicon substrate, said providing the first one of the components comprises:

providing a silicon on insulator wafer that comprises: the silicon substrate; a first oxide layer on top of the silicon substrate; and a top silicon layer on top of the first oxide layer;

structuring the top silicon layer of the silicon on insulator wafer to obtain a silicon component; and

depositing a second oxide layer on top of the first oxide layer of the wafer provided, so as to form said cladding layer, the latter comprising the first oxide layer and the second oxide layer, with the silicon component embedded therein; and

a second one of the components comprises a stack of III-V semiconductor gain materials, designed for optical amplification of a given radiation,

creating two cavities in said cladding layer, said creating comprising:

etching two cavities separated by a residual portion of said cladding layer in between, the silicon component embedded in said residual portion; and

filling the two etched cavities with an electrically insulating material to form respective thermal spreaders, wherein each thermal spreader has:

a thermal conductivity larger than that of the cladding layer; and

a refractive index that is lower than each of:

the refractive index of the silicon substrate; and

an average refractive index of the stack of III-V semiconductor gain materials for said given radiation, and

wafer bonding the two components and structuring the stack of III-V semiconductor gain materials so as to obtain a structured stack that faces and at least partially overlaps the formed thermal spreaders and is in thermal communication with each thermal spreader.

2. The method of fabricating according to claim 1 , wherein

each cavity is:

created by etching the cladding layer down to the silicon substrate; and

subsequently filled with a material to form the thermal spreader, so as for the latter to be in contact with the silicon substrate.

3. The method of fabricating according to claim 1 , wherein

the first wafer component provided is a silicon on insulator wafer and wherein the method further comprises, prior to creating each said cavity:

depositing a second oxide layer on a first oxide layer that corresponds to a buried oxide of the silicon on insulator wafer, so as to form said cladding layer, and wherein

each said cavity is subsequently etched through the second oxide layer so as for the each cavity to at least partly reach into the first oxide layer.

4. The method of fabricating according to claim 1 ,

wherein the stack of III-V semiconductor gain materials is structured so as for the resulting structured stack to be arranged opposite the thermal spreaders and in thermal communication therewith.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2017
From: CAËR, CHARLES; HAHN, HERWIG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044043/0698 →
Continuity (2)
Continuation 15587754 · May 5, 2017
Related Publication 20180323575A1 · Nov 8, 2018
Cited By (2)
US 12,374,858 US 12,609,510