Overflow region memory management
A memory module includes a host interface configured to provide an interface to a host computer; one or more memory devices; a deduplication engine configured to provide a virtual memory capacity of the memory module that is larger than a physical size of the one or more memory devices; a memory controller for controlling access to the one or more memory devices; a volatile memory comprising a hash table, an overflow memory region, and a credit unit, wherein the overflow memory region stores user data when a hash collision occurs or the hash table is full, and wherein the credit unit stores an address of an invalidated entry in the overflow memory region; and a control logic is configured to control the overflow memory region and the credit unit and generate a warning indicating a status of the overflow memory region and the credit unit.
1. A memory module comprising:
a host interface configured to provide an interface to a host computer;
one or more memory devices;
a deduplication engine configured to provide a virtual memory capacity of the memory module that is larger than a physical size of the one or more memory devices;
a memory controller for controlling access to the one or more memory devices;
a volatile memory comprising a hash table, an overflow memory region, and a credit unit, wherein the overflow memory region stores user data when a hash collision occurs or the hash table is full, and wherein the credit unit stores an address of an invalidated entry in the overflow memory region; and
a control logic is configured to control the overflow memory region and the credit unit and generate a warning indicating a status of the overflow memory region and the credit unit.
2. The memory module of claim 1 , wherein the host interface is a double data rate (DDR) interface.
3. The memory module of claim 1 , wherein the host interface is a peripheral component interconnect express (PCIe) interface.
4. The memory module of claim 1 , wherein a memory space for the credit unit is reserved within the overflow memory region.
5. The memory module of claim 4 , wherein a memory space for the credit unit is reserved in an SDRAM that is separate from the overflow memory region.
6. The memory module of claim 4 , wherein a size of the credit unit is set to be proportional to a size of the overflow memory region.
7. The memory module of claim 4 , wherein the warning indicating the status of the overflow memory region and the credit unit is generated using one or more registers.
8. The memory module of claim 1 , wherein the credit unit is implemented as a circular buffer including a head pointer and a tail pointer, or a last-in-first-out queue.
9. The memory module of claim 8 , wherein the control logic is configured to generate a status indicator of the overflow memory region including an almost-full warning, a full warning, an overrun error condition.
10. The memory module of claim 8 , wherein the control logic is configured to generate a credit unit condition indicator indicating a condition of the credit unit including a full warning and an empty warning.
11. A method comprising:
implementing a control logic in a deduplication memory module, wherein the deduplication memory module comprises one or more memory devices;
storing hash values of user data in a hash table of the deduplication memory module including entries of physical lines (PLs) that is identifiable by a physical line ID (PLID) stored in an address translation table by using a hash function;
providing a virtual memory capacity of the deduplication memory module that is larger than a physical size of the one or more memory devices;
storing user data in an overflow memory region when a hash collision occurs or the hash table is full;
storing one or more credits in a credit unit, wherein each of the one or more credits corresponds to an address of one or more invalidated entries in the overflow memory region; and
generating a warning indicating a status of the overflow memory region and the credit unit.
12. The method of claim 11 , further comprising providing a host interface between the deduplication memory module and a host computer.
13. The method of claim 12 , wherein the host interface is a double data rate (DDR) interface or a peripheral component interconnect express (PCIe) interface.
14. The method of claim 11 , wherein a memory space for the credit unit is reserved within the overflow memory region.
15. The method of claim 14 , wherein a memory space for the credit unit is reserved in an SDRAM that is separate from the overflow memory region.
16. The method of claim 14 , wherein a size of the credit unit is set to be proportional to a size of the overflow memory region.
17. The method of claim 14 , wherein the warning indicating the status of the overflow memory region and the credit unit is generated using one or more registers.
18. The method of claim 11 , wherein the credit unit is implemented as a circular buffer including a head pointer and a tail pointer, or a last-in-first-out queue.
19. The method of claim 18 , further comprising generating a status indicator of the overflow memory region including an almost-full warning, a full warning, an overrun error condition.
20. The method of claim 18 , further comprising generating a credit unit condition indicator indicating a condition of the credit unit including a full warning and an empty warning.