IP Library › Granted Patent US 10,269,953
Granted Patent B2
US 10,269,953 · App. 15/855,256 · Granted Apr 23, 2019

Semiconductor device having a trench gate

Inventors: David Laforet (Villach, AT); Cedric Ouvrard (Villach, AT)
Assignee: Infineon Technologies Austria AG
H01L29/7813H01L21/0217H01L21/02164H01L21/02238H01L21/26513H01L21/28211H01L29/0696H01L29/0847H01L29/1095H01L29/404H01L29/407H01L29/4236H01L29/66348H01L29/66734H01L29/7397H01L29/7811H01L21/02255H01L29/0878H01L29/41766H01L29/4238
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Quick Facts
Patent No.
US 10,269,953
App. No.
15/855,256
Granted
Apr 23, 2019
Kind
B2
Abstract

A semiconductor device includes a gate structure extending from a first surface into a semiconductor portion and having a metal gate electrode and a gate dielectric separating the metal gate electrode from the semiconductor portion. An interlayer dielectric separates a first load electrode from the semiconductor portion, and includes a screen oxide layer thinner than the gate dielectric. A body zone and a source zone are formed in the semiconductor portion and directly adjoin the gate structure.

Claims (31)

1. A semiconductor device, comprising:

a gate structure extending from a first surface into a semiconductor portion and comprising a metal gate electrode and a gate dielectric separating the metal gate electrode from the semiconductor portion;

an interlayer dielectric separating a first load electrode from the semiconductor portion, the interlayer dielectric comprising a screen oxide layer thinner than the gate dielectric; and

a body zone and a source zone formed in the semiconductor portion and directly adjoining the gate structure.

2. The semiconductor device of claim 1 , wherein the interlayer dielectric further comprises at least one of a silicon oxide and a silicate glass.

3. The semiconductor device of claim 1 , wherein the gate electrode includes a first portion extending from the first surface into the semiconductor portion and a second portion extending from the first surface through the screen oxide layer and into a further portion of the interlayer dielectric.

4. The semiconductor device of claim 1 , further comprising:

field plate structures extending from the first surface into the semiconductor portion.

5. The semiconductor device of claim 4 , wherein the gate structure forms a grid and the field plate structures are formed in meshes of the grid.

6. The semiconductor device of claim 4 , wherein each field plate structure comprises an electrically conductive field electrode and a field dielectric that electrically insulates the field electrode from the semiconductor portion.

7. The semiconductor device of claim 6 , wherein each field electrode is electrically connected to the source zone.

8. The semiconductor device of claim 1 , wherein the gate structure includes a plurality of separated gate structure portions.

9. The semiconductor device of claim 1 , wherein the gate dielectric is at least twice as thick as the screen oxide layer.

10. The semiconductor device of claim 1 , wherein at least one of the source zone and the body zone directly adjoins the gate dielectric.

11. The semiconductor device of claim 1 , wherein the screen oxide layer directly contacts the source zone at the first surface.

12. The semiconductor device of claim 11 , wherein the screen oxide layer comprises an upper surface opposite from the first surface, and wherein the interlayer dielectric comprises an additional dielectric region disposed between the upper surface and the load electrode.

13. A semiconductor device, comprising:

a gate structure extending from a first surface into a semiconductor portion and comprising a metal gate electrode and a gate dielectric separating the gate electrode from the semiconductor portion;

an interlayer dielectric separating a first load electrode from the first surface, wherein the gate electrode includes a first portion extending from the first surface into the semiconductor portion and a second portion extending from the first surface into the interlayer dielectric; and

a body zone and a source zone formed in the semiconductor portion and directly adjoining the gate structure,

wherein the second portion of the gate electrode laterally covers and extends above the gate dielectric.

14. The semiconductor device of claim 13 , wherein the interlayer dielectric comprises a screen oxide layer thinner than the gate dielectric.

15. The semiconductor device of claim 14 , wherein the second portion of the gate electrode extends through the screen oxide layer and into the interlayer dielectric.

16. The semiconductor device of claim 14 , wherein the gate dielectric is at least twice as thick as the screen oxide layer.

17. The semiconductor device of claim 13 , wherein the interlayer dielectric comprises at least one of a silicon oxide and a silicate glass.

18. The semiconductor device of claim 13 , further comprising:

field plate structures extending from the first surface into the semiconductor portion.

19. The semiconductor device of claim 18 , wherein the gate structure forms a grid and the field plate structures are formed in meshes of the grid.

20. The semiconductor device of claim 18 , wherein each field plate structure comprises an electrically conductive field electrode and a field dielectric that electrically insulates the field electrode from the semiconductor portion.

21. The semiconductor device of claim 20 , wherein each field electrode is electrically connected to the source zone.

22. The semiconductor device of claim 13 , wherein the gate structure includes a plurality of separated gate structure portions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2017
From: LAFORET, DAVID; OUVRARD, CEDRIC
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 044491/0390 →
Priority Claims (1)
DE 10 2015 117 469 · Oct 14, 2015 · national
Continuity (2)
Division 15292758 · Oct 13, 2016
Related Publication 20180122934A1 · May 3, 2018