IP Library › Granted Patent US 10,283,595
Granted Patent B2
US 10,283,595 · App. 15/074,847 · Granted May 7, 2019

Silicon carbide semiconductor substrate used to form semiconductor epitaxial layer thereon

Inventor: Chiaki Kudou (Toyama, JP)
Assignee: PANASONIC CORPORATION
H01L29/1608H01L21/02024H01L21/02035H01L29/32H01L29/34H01L29/36C30B23/025C30B25/20C30B29/36C30B33/00H01L21/0262H01L21/02378H01L21/02529H01L22/12
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Quick Facts
Patent No.
US 10,283,595
App. No.
15/074,847
Granted
May 7, 2019
Kind
B2
Abstract

A silicon carbide semiconductor substrate according to an aspect of the present disclosure has a first principal surface and a second principal surface opposite to the first principal surface. The silicon carbide semiconductor substrate includes a silicon carbide semiconductor crystal, and a first affected layer having crystal disturbances and disposed under the first principal surface. A thickness of the first affected layer in a first region including a center of the first principal surface is smaller than a thickness of the first affected layer in a second region surrounding the first region in a plane view.

Claims (7)

1. A silicon carbide semiconductor substrate having a first principal surface and a second principal surface opposite to the first principal surface, the silicon carbide semiconductor substrate comprising:

a silicon carbide semiconductor crystal;

a first affected layer having crystal disturbances and disposed under the first principal surface; and

a second affected layer having crystal disturbances and disposed under the second principal surface,

wherein a linear density of crystal disturbances in the first affected layer in a first region including a center of the first principal surface is lower than a linear density of crystal disturbances in the first affected layer in a second region surrounding the first region in a plane view, and

wherein the linear density of the crystal disturbances in the first affected layer in the first region and the linear density of crystal disturbances in the first affected layer in the second region are both higher than a linear density of crystal disturbances in the second affected layer.

2. The silicon carbide semiconductor substrate according to claim 1 , wherein the linear density of the crystal disturbances in the first affected layer in the second region is 200 disturbances/mm or more.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2016
From: KUDOU, CHIAKI
To: PANASONIC CORPORATION
Reel/Frame 038117/0405 →
Priority Claims (1)
JP 2015-080990 · Apr 10, 2015 · national
Continuity (1)
Related Publication 20160300910A1 · Oct 13, 2016