IP Library › Granted Patent US 10,290,566
Granted Patent B2
US 10,290,566 · App. 14/493,954 · Granted May 14, 2019

Electronic component

Inventors: Ralf Otremba (Kaufbeuren, DE); Klaus Schiess (Allensbach, DE); Oliver Haeberlen (St. Magdalen, AT); Matteo-Alessandro Kutschak (Ludmannsdorf, AT)
Assignee: Infineon Technologies Austria AG
H01L23/49575H01L21/8258H01L23/49562H01L25/0655H01L27/0629H01L27/0688H01L29/778H01L29/7786H01L29/7838H01L27/0605H01L29/1087H01L29/2003H01L29/8611H01L29/872H01L2224/0603H01L2224/4813H01L2224/48091H01L2224/48137H01L2224/49111
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Quick Facts
Patent No.
US 10,290,566
App. No.
14/493,954
Granted
May 14, 2019
Kind
B2
Abstract

In an embodiment, an electronic component includes a high-voltage depletion mode transistor including a current path coupled in series with a current path of a low-voltage enhancement mode transistor, a diode including an anode and a cathode, and a die pad. A rear surface of the high-voltage depletion mode transistor is mounted on and electrically coupled to the die pad. A first current electrode of the low-voltage enhancement mode transistor is mounted on and electrically coupled to the die pad. The anode of the diode is coupled to a control electrode of the high-voltage depletion mode transistor, and the cathode of the diode is mounted on the die pad.

Claims (27)

1. An electronic component, comprising:

a high-voltage depletion mode transistor comprising a current path coupled in series with a current path of a low-voltage enhancement mode transistor;

a diode comprising an anode and a cathode; and

a die pad,

the anode of the diode is electrically coupled to a control electrode of the high-voltage depletion mode transistor

wherein the high-voltage depletion mode transistor comprises a main surface which comprises the control terminal and a rear surface which is opposite from the main surface of the high-voltage depletion mode transistor;

wherein the low-voltage enhancement mode transistor comprises a rear surface which comprises a first current electrode;

wherein the diode comprises a rear surface arranged opposite from a main surface, the rear surface of the diode comprising the cathode, the main surface of the diode comprising the anode,

wherein the high-voltage depletion mode transistor, the low-voltage enhancement mode transistor, and the diode are mounted on a continuous portion of the die pad such that the rear surfaces of the high-voltage depletion mode transistor, the low-voltage enhancement mode transistor, and the diode each face and directly adjoin the continuous portion of the die pad, and

wherein the continuous portion of the die pad is directly electrically connected to the cathode and the first current electrode of the low-voltage enhancement mode transistor.

2. The electronic component according to claim 1 , wherein the high-voltage depletion mode transistor is operatively connected in a cascade arrangement to the low-voltage enhancement mode transistor.

3. The electronic component according to claim 1 , wherein the high-voltage depletion mode transistor is directly driven.

4. The electronic component according to claim 1 , wherein the diode is at least partially integrated in the high-voltage depletion mode transistor.

5. The electronic component according to claim 1 , wherein the high-voltage depletion mode transistor comprises a discrete component, the low-voltage enhancement mode transistor comprises a discrete component and the diode is provided as a discrete component.

6. The electronic component according to claim 1 , wherein the control electrode of the high-voltage depletion mode transistor is further coupled to a contact pad of the electronic component.

7. The electronic component according to claim 1 , wherein the control electrode of the high-voltage depletion mode transistor is further coupled to a low-voltage current electrode of the low-voltage enhancement mode transistor.

8. The electronic component according to claim 1 , wherein the high-voltage depletion mode transistor and the low-voltage enhancement mode transistor are mounted adjacent one another in a composite package.

9. The electronic component according to claim 1 , wherein the high-voltage depletion mode transistor further comprises a highly doped semiconductor substrate of a first conductivity type, a lightly doped semiconductor layer of the first conductivity type on the highly doped semiconductor substrate and a compound semiconductor layer arranged on the lightly doped semiconductor layer.

10. The electronic component according to claim 9 , wherein the diode comprises a highly doped p-well arranged in the lightly doped semiconductor layer and a conductive via coupled to the control electrode of the high-voltage depletion mode transistor.

11. The electronic component according to claim 9 , wherein the diode comprises a Schottky contact with the lightly semiconductor doped layer and a conductive via coupled to the control electrode of the high-voltage depletion mode transistor.

12. The electronic component according to claim 1 , wherein the high-voltage depletion mode transistor is a Group III-nitride-based High Electron Mobility transistor.

13. The electronic component according to claim 1 , wherein the low-voltage enhancement mode transistor is selected from the group consisting of an IGBT, a p-channel MOSFET and an n-channel MOSFET.

14. The electronic component according to claim 1 , wherein the rear surface of the high-voltage depletion mode transistor, the first current electrode of the low-voltage enhancement mode transistor, and the cathode of the diode are coupled to a common ground.

15. The electronic component according to claim 1 , wherein the high-voltage depletion mode transistor, the low-voltage enhancement mode transistor, and the diode are mounted adjacent one another in a horizontal direction on the die pad in a composite package.

16. The electronic component according to claim 1 , wherein the main surface of the high-voltage depletion mode transistor further comprises first and second current electrodes, wherein the low-voltage enhancement mode transistor comprises a main surface which is opposite the rear surface of the low-voltage enhancement mode transistor, wherein the main surface of the low-voltage enhancement mode transistor comprises a control terminal and a second current electrode.

17. The electronic component according to claim 16 , wherein first current electrode of the low-voltage enhancement mode transistor is a source electrode.

18. The electronic component according to claim 17 , wherein first current electrode of the low-voltage enhancement mode transistor is a drain electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2014
From: SCHIESS, KLAUS; KUTSCHAK, MATTEO-ALESSANDRO; HAEBERLEN, OLIVER; OTREMBA, RALF
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 033798/0962 →
Continuity (1)
Related Publication 20160086878A1 · Mar 24, 2016
Cited By (1)
US 12,334,458