IP Library › Granted Patent US 10,297,673
Granted Patent B2
US 10,297,673 · App. 14/878,230 · Granted May 21, 2019

Methods of forming semiconductor devices including conductive contacts on source/drains

Inventors: Jorge A. Kittl (Round Rock, TX); Ganesh Hegde (Austin, TX); Rwik Sengupta (Austin, TX); Borna J. Obradovic (Leander, TX); Mark S. Rodder (Dalias, TX)
Assignee: Samsung Electronics Co., Ltd.
H01L29/665H01L21/28512H01L21/28518H01L23/485H01L29/41725H01L29/41791H01L29/66545H01L29/66795H01L21/76843H01L29/165H01L29/7848
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Quick Facts
Patent No.
US 10,297,673
App. No.
14/878,230
Granted
May 21, 2019
Kind
B2
Abstract

Methods of forming a semiconductor device are provided. The methods may include forming a plurality of fin-shaped channels on a substrate, forming a gate structure crossing over the plurality of fin-shaped channels and forming a source/drain adjacent a side of the gate structure. The source/drain may cross over the plurality of fin-shaped channels and may be electrically connected to the plurality of fin-shaped channels. The methods may also include forming a metallic layer on an upper surface of the source/drain and forming a conductive contact on the metallic layer opposite the source/drain. The conductive contact may have a first length in a longitudinal direction of the metallic layer that is less than a second length of the metallic layer in the longitudinal direction of the metallic layer.

Claims (70)

1. A method of forming a semiconductor device comprising:

forming a plurality of fin-shaped channels on a substrate;

forming a gate structure crossing over the plurality of fin-shaped channels;

forming a source/drain adjacent a side of the gate structure, the source/drain crossing over the plurality of fin-shaped channels and being electrically connected to the plurality of fin-shaped channels;

forming a metallic layer on an upper surface of the source/drain; and

forming a conductive contact on the metallic layer opposite the source/drain, the conductive contact having a first length in a longitudinal direction of the metallic layer that is less than a second length of the metallic layer in the longitudinal direction of the metallic layer.

2. The method of claim 1 , wherein forming the metallic layer comprises:

forming an insulation layer on the gate structure and the source/drain;

forming an opening extending through the insulation layer and exposing at least a portion of the source/drain; and

forming the metallic layer on the source/drain.

3. The method of claim 2 , wherein the second length of the metallic layer in the longitudinal direction of the metallic layer is greater than a distance between two adjacent ones of the plurality of fin-shaped channels.

4. The method of claim 2 , wherein the insulation layer comprises a first insulation layer, and

wherein forming the gate structure comprises:

forming a dummy gate structure crossing over the plurality of fin-shaped channels;

forming a second insulation layer on sides of the dummy gate structure; and

replacing the dummy gate structure with a gate insulation layer and a gate electrode, the gate electrode comprising a metal.

5. The method of claim 2 , wherein the insulation layer comprises a first insulation layer, and

wherein forming the conductive contact comprises:

forming a second insulation layer on the metallic layer in the opening;

forming a contact opening extending through the second insulation layer and exposing the metallic layer; and

forming the conductive contact in the contact opening.

6. The method of claim 1 , wherein the metallic layer comprises a silicide layer and/or a stack of layers, and

wherein the stack of layers comprises a stack comprising a dielectric layer and a metal layer or a stack comprising a rare-earth or alkaline earth metal layer, a metal layer and a capping layer.

7. The method of claim 1 , wherein forming the source/drain and the metallic layer comprises:

forming an insulation layer on the plurality of fin-shaped channels and the gate structure;

forming an opening extending through the insulation layer and exposing the plurality of fin-shaped channels;

forming the source/drain in the opening by performing a epitaxial growth process using the plurality of fin-shaped channels that are exposed by the opening as seed layers; and

forming the metallic layer on the source/drain.

8. A method of forming a semiconductor device comprising:

forming a plurality of fin-shaped channels on a substrate;

forming a gate structure crossing over the plurality of fin-shaped channels;

forming a source/drain adjacent a side of the gate structure, the source/drain crossing over the plurality of fin-shaped channels and being electrically connected to the plurality of fin-shaped channels;

forming a metallic layer on an upper surface of the source/drain; and

forming a conductive contact on the metallic layer opposite the source/drain, the conductive contact vertically overlapping less than all of the plurality of fin-shaped channels.

9. The method of claim 8 , wherein the metallic layer vertically overlaps a first number of the plurality of fin-shaped channels that is greater than a second number of the plurality of fin-shaped channels that the conductive contact vertically overlaps.

10. The method of claim 9 , wherein the metallic layer vertically overlaps all of the plurality of fin-shaped channels.

11. The method of claim 8 , wherein the conductive contact vertically overlaps only a portion of the metallic layer in a longitudinal direction of the metallic layer.

12. The method of claim 8 , wherein forming the metallic layer and the conductive contact comprises:

forming a first insulation layer on the gate structure and the source/drain;

forming an opening extending through the first insulation layer and exposing the source/drain;

forming the metallic layer on the source/drain;

forming a second insulation layer on the metallic layer in the opening;

forming a contact opening extending through the second insulation layer and exposing the metallic layer; and

forming the conductive contact in the contact opening.

13. The method of claim 12 , wherein forming the gate structure comprises:

forming a dummy gate structure crossing over the plurality of fin-shaped channels;

forming a third insulation layer on sides of the dummy gate structure; and

replacing the dummy gate structure with a gate insulation layer and a gate electrode, the gate electrode comprising a metal.

14. The method of claim 8 , wherein the metallic layer comprises a silicide layer and/or a stack of layers, and

wherein the stack of layers comprises a stack comprising a dielectric layer and a metal layer or a stack comprising a rare-earth or alkaline earth metal layer, a metal layer and a capping layer.

15. A method of forming a semiconductor device comprising:

forming a plurality of fin-shaped channels on a substrate;

forming a gate structure crossing over the plurality of fin-shaped channels;

forming a source/drain adjacent a side of the gate structure, the source/drain crossing over the plurality of fin-shaped channels and being electrically connected to the plurality of fin-shaped channels; and

forming a conductive contact on an upper surface of the source/drain, the conductive contact having a first length in a longitudinal direction of the source/drain that is less than a second length of the source/drain in the longitudinal direction of the source/drain.

16. The method of claim 15 , wherein the conductive contact vertically overlaps only a portion of the plurality of fin-shaped channels.

17. The method of claim 15 , further comprising forming a metallic layer between the source/drain and the conductive contact, wherein the metallic layer has a third length in the longitudinal direction of the source/drain that is greater than the first length of the conductive contact.

18. The method of claim 15 , further comprising forming a metallic layer between the source/drain and the conductive contact, wherein forming the metallic layer and the conductive contact comprises:

forming a first insulation layer on the gate structure and the source/drain;

forming an opening extending through the first insulation layer and exposing the source/drain;

forming the metallic layer on the source/drain;

forming a second insulation layer on the metallic layer in the opening;

forming a contact opening extending through the second insulation layer and exposing the metallic layer; and

forming the conductive contact in the contact opening, the conductive contact contacting the metallic layer.

19. The method of claim 18 , wherein forming the gate structure comprises:

forming a dummy gate structure crossing over the plurality of fin-shaped channels;

forming a third insulation layer on sides of the dummy gate structure; and

replacing the dummy gate structure with a gate insulation layer and a gate electrode, the gate electrode comprising a metal.

20. The method of claim 15 , further comprising forming a metallic layer between the source/drain and the conductive contact, wherein the metallic layer comprises a silicide layer and/or a stack of layers, and

wherein the stack of layers comprises a stack comprising a dielectric layer and a metal layer or a stack comprising a rare-earth or alkaline earth metal layer, a metal layer and a capping layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2015
From: KITTL, JORGE A.; HEGDE, GANESH; SENGUPTA, RWIK; OBRADOVIC, BORNA J.; RODDER, MARK S.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 036757/0005 →
Continuity (2)
Provisional Application 62061570 · Oct 8, 2014
Related Publication 20160104787A1 · Apr 14, 2016