IP Library › Granted Patent US 10,303,366
Granted Patent B2
US 10,303,366 · App. 15/094,454 · Granted May 28, 2019

Data storage device that divides and processes a command and data processing system including the same

Inventors: Gi Jo Jeong (Gwacheon-si, KR); Tae Hack Lee (Hwaseong-si, KR); Sang Kyoo Jeong (Seoul, KR); Kwang Ho Choi (Seoul, KR); Myeong Eun Hwang (Seongnam-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F3/061G06F3/0659G06F3/0688
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,303,366
App. No.
15/094,454
Granted
May 28, 2019
Kind
B2
Abstract

A data storage device includes a processor and a non-volatile memory. The processor compares a data processing size of a first command received from the host at a first time point with a reference size and divides the first command into a plurality of sub-commands when the data processing size is greater than the reference size. The data storage device further includes a memory that includes a first queue and a second queue.

Claims (42)

1. A data storage device connected with a host, the data storage device comprising:

a processor;

a memory that includes a first queue and a second queue; and

a non-volatile memory,

wherein the processor compares a data processing size of a first command received from the host at a first time point with a reference size and divides the first command into a plurality of sub-commands when the data processing size is greater than the reference size, and a first sub-command of the plurality of sub-commands to be processed is stored in the first queue and remaining plurality of sub-commands are stored in the second queue,

wherein when the processor receives a second command from the host at the first time point, the processor processes one of the first sub-command and the second command based on the order in which the first command and the second command have been received, and

the processor processes the remaining plurality of sub-commands after processing the first sub-command and the second command.

2. The data storage device of claim 1 , wherein when the processor receives a plurality of third commands from the host at the first time point after receiving the first and second commands,

the processor processes a predetermined number of third commands between processing individual sub-commands of the remaining plurality of sub-commands.

3. The data storage device of claim 1 , wherein when a second command is received while one but not the last of the plurality of sub-commands is being processed,

the processor processes the second command before the last of the plurality of sub commands is processed.

4. The data storage device of claim 1 , further comprising

a controller that controls data processing operations of the non-volatile memory based on the first command, wherein the controller supports a protocol for processing commands out of order.

5. The data storage device of claim 4 , wherein the controller comprises a context saving block that stores information about a subsequent sub-command after one of the plurality of sub-commands is processed.

6. The data storage device of claim 1 , wherein a data processing size of each of the plurality of sub-commands is less than or equal to the reference size, and the reference size and the data processing size of each of the plurality of sub-commands are changeable using firmware.

7. The data storage device of claim 1 , wherein the data storage device is one of a solid state drive (SSD) or a universal flash storage (UFS).

8. A data processing system comprising:

a data storage device that includes a processor and a non-volatile memory; and

a host that controls an operation of the data storage device,

wherein the data storage device receives a plurality of commands at a first time point and compares a data processing size of each command received from the host at the first time point with a reference size, and, when the data processing size of a first command is greater than the reference size, divides the first command into a plurality of sub-commands having a data processing size less than or equal to than the reference size;

wherein the data storage device processes a first sub-command and a second command received after the first command based on the order in which the first and second commands are received, and processes the remaining sub-commands after processing the first sub-command and the second command; and

processes a predetermined number of third commands received after the second command between processing individual sub-commands of a remaining plurality of sub-commands.

9. The data processing system of claim 8 , wherein when a fourth command is received while one but not the last one of the plurality of sub-commands is being processed,

the processor processes the fourth command before the last of the sub commands is processed.

10. The data processing system of claim 8 , wherein the data storage device further comprises a memory that includes a first queue and a second queue,

wherein a first sub-command of the plurality of sub-commands to be processed is stored in the first queue, and the remaining plurality of sub-commands are stored in the second queue.

11. The data processing system of claim 8 , wherein when the processor receives the second command from the host at the first time point,

the processor processes one of the first sub-command and the second command based on the order in which the first command and the second command have been received.

12. The data processing system of claim 11 , wherein the processor processes the remaining plurality of sub-commands after processing the first sub-command and the second command.

13. The data processing system of claim 8 , wherein the data storage device further comprises a controller that controls data processing operations of the non-volatile memory based on the first command,

wherein the controller supports a protocol for processing commands out of order, wherein the controller comprises a context saving block that stores information about a subsequent sub-command after one of the plurality of sub-commands is processed.

14. The data processing system of claim 8 , wherein a data processing size of each of the plurality of sub-commands is less than or equal to the reference size, and the reference size and the data processing size of each of the plurality of sub-commands are changeable using firmware.

15. A method of operating a data storage device, comprising the steps of:

receiving a first command from a host at a first time point;

comparing a data processing size of the first command with a reference size;

dividing the first command into a plurality of consecutive sub-commands, if the data processing size is greater than the reference size; and

storing a first sub-command of the plurality of sub-commands to be processed in a first queue and remaining plurality of sub-commands in a second queue,

wherein upon receiving a second command from the host at the first time point, the method further comprises

determining the processing order of the first and second commands;

processing a first sub-command and the second command in the determined order; and

processing the remaining plurality of sub-commands in order.

16. The method of claim 15 , wherein upon receiving a third command at a second time point while a current sub-command is being processed, the method further comprises processing the third command after processing the current sub-command and before processing a subsequent sub-command.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2016
From: JEONG, GI JO; LEE, TAE HACK; CHOI, KWANG HO; HWANG, MYEONG EUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 038230/0974 →
Priority Claims (1)
KR 10-2015-0050392 · Apr 9, 2015 · national
Continuity (1)
Related Publication 20160299690A1 · Oct 13, 2016