Modular array of vertically integrated superconducting qubit devices for scalable quantum computing
A technique relates to an assembly for a quantum computing device. A quantum bus plane includes a first set of recesses. A readout plane includes a second set of recesses. A block is positioned to hold the readout plane opposite the quantum bus plane, such that the first set of recesses opposes the second set of recesses. A plurality of qubit chips are included where each has a first end positioned in the first set of recesses and has a second end positioned in the second set of recesses.
1. A quantum device, comprising:
a first structure including a first set of couplings;
a second structure including a second set of couplings; and
at least one qubit chip coupled to the first set of couplings and the second set of couplings, wherein the at least one qubit chip comprises a readout resonator.
2. The quantum device of claim 1 , wherein the first structure comprises a circuit.
3. The quantum device of claim 2 , wherein the circuit is configured to couple at least two qubit chips.
4. The quantum device of claim 2 , wherein the circuit comprises at least one coupling resonator.
5. The quantum device of claim 1 , wherein the second structure comprises a circuit.
6. The quantum device of claim 5 , wherein the circuit comprises transmission lines configured to couple to qubit chips.
7. The quantum device of claim 6 , wherein the transmission lines are configured to couple the qubits chips to connectors.
8. The quantum device of claim 1 , wherein the at least one qubit chip is positioned to the first and second structures for communication.
9. The quantum device of claim 1 , wherein the at least one qubit chip comprises a superconducting qubit.
10. A quantum device, comprising:
a quantum bus plane including a first set of couplings;
a readout plane including a second set of couplings; and
qubit chips positioned to the first set of couplings and positioned to the second set of couplings, wherein the quantum bus plane comprises a substrate with interconnect wiring, the interconnect wiring connecting the qubit chips via coupling bus resonators.
11. The quantum device of claim 10 , wherein the qubit chips extend to the quantum bus plane and the readout plane.
12. The quantum device of claim 10 , wherein the first set of couplings is configured to receive the qubit chips in the readout plane; and
wherein the second set of couplings is configured to receive the qubit chips in the quantum bus plane.
13. The quantum device of claim 10 , wherein the readout plane comprises a substrate with fan-out wiring, the fan-out wiring individually connecting each of the qubit chips to a circuit board.
14. The quantum device of claim 13 , wherein the circuit board individually connects each of the qubit chips to connectors in a one-to-one relationship.
15. A quantum device comprising:
a first coupling;
a second coupling; and
a qubit chip coupled to the first coupling and the second coupling, the qubit chip comprising a superconducting qubit and a readout resonator.
16. The quantum device of claim 15 , wherein the first coupling is formed on a first structure comprising a first circuit.
17. The quantum device of claim 16 , wherein the second coupling is formed on a second structure comprising a second circuit.
18. The quantum device of claim 17 , wherein the first structure opposes the second structure so as to position the qubit chip.