IP Library › Granted Patent US 10,304,677
Granted Patent B2
US 10,304,677 · App. 15/952,895 · Granted May 28, 2019

Low-k feature formation processes and structures formed thereby

Inventors: Wan-Yi Kao (Baoshan, TW); Chung-Chi Ko (Jushan Jen, TW); Li Chun Te (Renwu, TW); Hsiang-Wei Lin (New Taipei, TW); Te-En Cheng (Taoyuan, TW); Wei-Ken Lin (Tainan, TW); Guan-Yao Tu (Hsinchu, TW); Shu Ling Liao (Taichung, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/0228H01L21/02126H01L21/02205H01L21/02208H01L21/31111H01L21/823468H01L29/6656H01L21/266H01L21/26513H01L21/3065H01L21/31053H01L21/76224H01L21/823418H01L21/823431H01L21/823437H01L21/823481H01L29/36H01L29/66545H01L29/66795
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Quick Facts
Patent No.
US 10,304,677
App. No.
15/952,895
Granted
May 28, 2019
Kind
B2
Abstract

Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Claims (64)

1. A method comprising:

forming a dielectric layer using an Atomic Layer Deposition (ALD) process, the dielectric layer having an increasing concentration gradient of oxygen in a direction from an initially formed portion of the dielectric layer to a subsequently formed portion of the dielectric layer, the dielectric layer having a decreasing concentration gradient of nitrogen in the direction, the ALD process comprising:

for a cycle:

flowing an oxygen source precursor at an oxygen flow rate; and

flowing a nitrogen source precursor at a nitrogen flow rate; and

repeating the cycle a number of times, wherein the oxygen flow rate increases during repeating the cycle the number of times, and the nitrogen flow rate decreases during repeating the cycle the number of times.

2. The method of claim 1 , wherein the dielectric layer is formed along a gate stack.

3. The method of claim 2 further comprising:

forming a low-k spacer layer on the dielectric layer; and

forming a gate spacer comprising anisotropically etching the low-k spacer layer and the dielectric layer.

4. The method of claim 1 , wherein the initially formed portion of the dielectric layer is nitrogen-rich.

5. The method of claim 1 , wherein:

the ALD process further comprises, for the cycle:

flowing a silicon source precursor at a silicon flow rate; and

flowing a carbon source precursor at a carbon flow rate; and

the silicon flow rate and the carbon flow rate are constant during repeating the cycle the number of times.

6. The method of claim 5 , wherein:

the silicon source precursor is Si 2 Cl 6 ;

the carbon source precursor is C 3 H 6 ;

the oxygen source precursor is O 2 ; and

the nitrogen source precursor is NH 3 .

7. A method of manufacturing a semiconductor device, the method comprising:

pulsing for a first time a first oxygen source precursor into a deposition chamber at a first flow rate;

after the pulsing for the first time the first oxygen source precursor, pulsing for a first time a first nitrogen source precursor into the deposition chamber at a second flow rate;

after the pulsing for the first time the first nitrogen source precursor, pulsing for a second time the first oxygen source precursor at a third flow rate different from the first flow rate; and

after the pulsing for the second time the first oxygen source precursor, pulsing for a second time the first nitrogen source precursor into the deposition chamber at a fourth flow rate different from the second flow rate, wherein the pulsing the first oxygen source precursor and the pulsing the first oxygen source precursor form a dielectric layer, the dielectric layer having an increasing concentration gradient of oxygen in a first direction and the dielectric layer having a decreasing concentration gradient of nitrogen in the first direction.

8. The method of claim 7 , wherein the dielectric layer is formed along a gate stack.

9. The method of claim 8 further comprising:

forming a low-k spacer layer on the dielectric layer; and

forming a gate spacer comprising anisotropically etching the low-k spacer layer and the dielectric layer.

10. The method of claim 7 , wherein the pulsing for the first time the first nitrogen source precursor forms a nitrogen-rich region.

11. The method of claim 7 , further comprising:

pulsing a silicon source precursor at a silicon flow rate; and

pulsing a carbon source precursor at a carbon flow rate, wherein the silicon flow rate and the carbon flow rate are constant during each pulse.

12. The method of claim 11 , wherein:

the silicon source precursor is Si 2 Cl 6 ;

the carbon source precursor is C 3 H 6 ;

the first oxygen source precursor is O 2 ; and

the first nitrogen source precursor is NH 3 .

13. A method of manufacturing a semiconductor device, the method comprising:

initiating an atomic layer deposition process to form a dielectric layer by initiating a first pulse of Si 2 Cl 6 into a deposition chamber;

purging the deposition chamber;

initiating a first pulse of C 3 H 6 into the deposition chamber;

purging the deposition chamber;

initiating a first pulse of O 2 into the deposition chamber at a first oxygen flow rate;

purging the deposition chamber;

initiating a first pulse of NH 3 into the deposition chamber at a first nitrogen flow rate;

purging the deposition chamber;

initiating a second pulse of Si 2 Cl 6 into the deposition chamber;

purging the deposition chamber;

initiating a second pulse of C 3 H 6 into the deposition chamber;

purging the deposition chamber;

initiating a second pulse of O 2 into the deposition chamber at a second oxygen flow rate higher than the first oxygen flow rate;

purging the deposition chamber; and

initiating a second pulse of NH 3 into the deposition chamber at a second nitrogen flow rate less than the first nitrogen flow rate.

14. The method of claim 13 , wherein the atomic layer deposition process deposits a dielectric layer along a gate stack.

15. The method of claim 14 , further comprising:

forming a low-k spacer layer on the dielectric layer; and

forming a gate spacer comprising anisotropically etching the low-k spacer layer and the dielectric layer.

16. The method of claim 15 , wherein the dielectric layer has an increasing concentration gradient of oxygen.

17. The method of claim 16 , wherein the dielectric layer has a decreasing concentration gradient of nitrogen.

18. The method of claim 13 , wherein a flow rate of each pulse of C 3 H 6 is constant.

19. The method of claim 13 , wherein the initiating the first pulse of NH 3 into the deposition chamber forms a nitrogen-rich region.

20. The method of claim 13 , wherein a flow rate of each pulse of Si 2 Cl 6 is constant.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2018
From: KAO, WAN-YI; KO, CHUNG-CHI; TE, LI CHUN; LIN, HSIANG-WEI; CHENG, TE-EN; LIN, WEI-KEN; TU, GUAN-YAO; LIAO, SHU LING
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 045884/0821 →
Continuity (2)
Provisional Application 62565755 · Sep 29, 2017
Related Publication 20190103265A1 · Apr 4, 2019
Cited By (1)
US 12,506,001